MARLUG - 2025
User2User Mid-Atlantic is your opportunity to learn, grow and connect with fellow technical experts who design leading-edge electronics products using Siemens EDA tools.
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Session Slides
Session Title
Abstract
Slides
System Testbench with Questa Parallelsim
- John Liu - Northrop GrummanQuesta ParallelSim processing significantly improves test efficiency and performance in a complex multichip FPGA system. This work leverages Questa parallelism to improve UVM test efficiency in a multichip testbench while maintaining high performance, using Questa Sim v2025.1.2. The design includes four Xilinx Zynq Ultrascale+™ FPGAs linked via AMD™ Aurora SERDES IP, enabling verification of bidirectional high-speed data transmission. Regression testing is optimized on a MOAB cluster to run parallel jobs, demonstrating scalable and efficient system-level verification. PDF Enhancing Verification Productivity with Questa One Sim
- Sunil Sahoo - Siemens EDAImproving productivity has become crucial for efficiently utilizing expensive human and grid resources in the functional verification process. Achieving the "done" state requires more than simulator performance—it demands a strategic focus on optimizing workflows, prioritizing tasks, and leveraging metrics to guide efforts. Questa One Sim’s productivity-driven approach ensures resources are deployed effectively, accelerating verification closure. PDF Questa One Avery Verification IP: Delivering Accelerated Confidence
- Luis Rodriguez - Siemens EDAQuesta One Avery VIP’s cutting-edge technologies promise to enhance productivity and ease of use in the rapidly expanding landscape of complex interfaces and memory protocols, spanning SoC designs, 3DIC chiplets, and FW/SW integration. PDF Accelerating Coverage Closure in FPGA Verification: Metric-Driven Verification Leveraging Questa CoverCheck
- Jeffrey Jacobson, Ajay Bhaskaran, Marc Jurchak - L3HarrisFPGAs have evolved to match ASIC-level complexity, there is a dire need for deploying metric-driven verification to ensure comprehensive verification with the need for “accelerated” coverage closure. We share key challenges, and deployment steps from implementing Questa CoverCheck for automated Code coverage analysis and improvement, highlighting measurable gains in verification execution efficiency with tangible results. TBD