Raising the Bar in Mission-Critical Verification: Aerospace and Defense Trends Analysis of FPGA Design Practices

This report examines trends in functional verifica­tion across the field-programmable gate array (FPGA) market segments identified in the 2024 Siemens EDA and Wilson Research Group study. It continues a series of industry-wide analyses conducted over the past two decades^{1, 2, 3, 4}. For the 2024 edition, we distinguish between FPGA and IC/ASIC functional verification trends, with this report focusing exclusively on the former. While a separate general report presents findings across all major market segments, this report delves deeper into the aerospace and defense (A&D) sector—comparing its verification practices, challenges, and maturity with those of the broader industry to highlight key simi­larities and differences. We will first graphically present the findings across all market segments, followed by a detailed discussion of specific findings related to the A&D sector. For A&D teams navigating increasingly complex and constrained design envi­ronments, the findings in this report can serve as a benchmarking tool to assess verification effective­ness, technology adoption, and staffing alignment.

The Global FPGA Semiconductor Market

IBS estimates the global semiconductor market was valued at $547 billion in 2021. Despite a temporary decline to approximately $526.8 billion in 2023 due to economic challenges and softening demand, the market is projected to rebound to $635 billion by 2025⁵. Within this broader landscape, the FPGA segment—excluding ICs, ASICs, and memories—was valued at $8.27 billion in 2023 and continues to experience steady growth. Key drivers include data center computing, networking, storage, next-gener­ation communication systems, and increasingly, domain-specific acceleration.

FPGAs have long offered two critical advantages over ASICs. First, their low non-recurring engi­neering costs make them economically attractive for lower-volume production. Second, their re-program­mability and rapid prototyping capabilities enable faster development cycles by allowing teams to iterate and validate designs more extensively in the lab. More recently, FPGAs have demonstrated compelling performance advantages in specialized workloads—such as AI inferencing—by exploiting hardware parallelism.

While the IC/ASIC market in the mid- to late-2000s faced significant verification challenges due to increasing complexity, today’s FPGA market is encountering similar issues. The shift toward system-on-chip (SoC) class FPGAs, integration of high-speed interfaces, and use in safety- and mission-critical applications—such as those in the A&D sector—have elevated the need for rigorous, scalable pre-silicon verification practices. Many FPGA teams still rely on lab-based validation as their primary verification strategy, a holdover from earlier eras when designs were less complex and the risks lower. However, this approach is increasingly unsus­tainable for modern FPGA projects.

This report explores these dynamics and quantifies their impact on functional verification outcomes across all sectors. Additionally, we present a focused comparison with the A&D segment to highlight how this market’s unique requirements influence verifi­cation practices and outcomes.