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Solutions

The Verification Academy Solutions section delivers focused insights into key market segments and verification products that address today’s emerging challenges. Explore how advanced technologies and methodologies—spanning functional verification, safety, security, and more—are applied to solve real-world design problems. This curated content brings together best practices, expert perspectives, and proven tools to accelerate verification success.
Techniques

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Techniques

Design for Test Verification

Safety & Security

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Methodology

Unified Coverage

Design for Test Verification

Accelerating DFT Sign-Off with Questa One

Tackling Emerging DFT Verification Challenges with Questa One

Functional Safety

Functional Safety for ISO 26262

Functional Safety for DO-254

Unified Coverage

Questa One Unified Coverage Solution: Transforming Verification Through Intelligence

Boost Your Verification Productivity with Questa Verification IQ

Coverage Closure Acceleration Using Collaborative Verification IQ Tool

Functional Safety for ISO 26262

Accelerated Assurance with Questa One Functional Safety

Functional Safety for DO-254

Introduction to DO-254
Topics

The Verification Academy offers users multiple entry points to find the information they need. One of these entry points is through Topic collections. These topics are industry standards that all design and verification engineers should recognize. While we continue to add new topics, users are encourage to further refine collection information to meet their specific interests.
UVM

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Questa Design Solutions

Clock-Domain Crossing

Formal Verification

Reset-Domain Crossing

Verification Management & IP

Verification IQ

Verification IP

Verification Planning
Cookbooks

Find all the methodology you need in this comprehensive and vast collection. The UVM and Coverage Cookbooks contain dozens of informative, executable articles covering all aspects of UVM and Coverage.
UVM

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UVM

UVM Basics

UVM Testbench

UVM Configuring a Test Environment

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UVM Stimulus Techniques

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UVM Debugging

UVM Connect

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SystemVerilog Performance

UVM Coding

UVM Performance

UVM 1800.2

UVM 1.2

OVM to UVM

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UVM 1.2

UVM 1.1d

UVM 1.1c

UVM 1.1b

UVM 1.1a

Coverage

Coverage Metrics and Process (Theory)

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Verification Horizons Blog

From Rule-Based Beginnings to AI-Driven Design: Tracing the Evolution of AI in EDA

DFT Verification: Tackling the Evolving Challenges

Closing the Gap in Software Skills for Verification Engineers

Accellera announces fee-free availability of IEEE Std. 1801™-2024

Got Coverage?

Update from the Standards World: Accellera Approves UVM-MS 1.0 Standard

Events & Webinars

Siemens EDA at DAC 2025

Siemens EDA Forum Seoul 2025

VA Live 2025

Post Event Archive

osmosis

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Debug

Faster Debug of Complex Testbenches using Visualizer

Win the Tick to Trade Race by Root Causing Bugs Faster with QuestaSim

Prevent Performance Problems with Prompt RTL Profiling

Accelerate Development Using Advanced Debugging Approaches

Formal Verification

Generating SystemVerilog Assertion (SVA) Properties with Property Assist

Streamlining FPU Verification with an Alternative to C-reference Model Approaches

Explore How to Protect Against Data Corruption with Formal Security Verification

Questa Formal Verification IP AMBA: Achieve Protocol Compliance in Designs

Functional Verification Workflow for Trusted and Assured Microelectronics

FPGA Verification

Securing your FPGA Design from RTL through to the Bitstream

Improving FPGA Safety and Security Compliance: FPGA Equivalence Checking from RTL to the Bitstream

Bringing Model-based Systems Engineering to IC and FPGA Design

ModelSim to Questa - Productivity Features

Functional Safety

Enhancing Automotive Safety Verification Using Questa One Sim FX

Enhancing Defect Coverage in DFT

Safety Analysis for Automotive Chips Based on ISO 26262

An End-to-End Functional Safety Solution for Automotive ICs Based on ISO 26262

Union of SoC Design & Functional Safety FlowUnion of SoC Design & Functional Safety Flow

Questa Design Solutions

Improving Designer Productivity and Enabling Faster RDC Verification Closure with Machine Learning

New Advanced Techniques for Reset Domain Crossing (RDC) Analysis

Continuous Integration (CI) Driving Efficient Program Execution

Questa Design Solutions as a Sleep Aid

Applying Machine Learning to Accelerate CDC Analysis

Formal and the Next Normal

Questa Lint vs Formal AutoCheck

Simulation

Accelerating Functional Coverage with Questa One CX

Tackling Emerging DFT Verification Challenges with Questa One

Faster Debug Using QuestaSim Interactive Coverage Analysis

Unlocking the Power of QuestaSim and Visualizer Integration

Productivity in the Questa Simulation Flow

SystemVerilog

Introduction to SystemVerilog Assertions

Generating SVA Properties with Property Assist

Easy Test Writing with a Proxy-driven Testbench

Making Your DPI-C Interface a Fast River of Data

The Life of a SystemVerilog Variable

Verification IP

Breaking Barriers: Ethernet 1.6T, Infiniband, UALink, and UEC Verification for Next-Gen Connectivity

PCIe Gen7 Verification with Siemens Avery Verification IP

Verifying the Next Generation High Bandwidth Memory Controllers for AI and HPC Applications

The Future of Multi-Die System Verification with UCIe

Verification IQ

Streamlining Requirements Traceability using Questa Verification IQ Testplan Author

Smart Debug: Accelerate Root Cause Analysis and Reduce Debug Turnaround Time with Questa Verification IQ Regression Navigator

Smart Regression: Optimize Regression Efficiency Using Questa Verification IQ Regression Navigator

Boost Your Verification Productivity with Questa Verification IQ

Questa Verification IQ: Boost Verification Predictability and Efficiency with Big Data

Verification Planning

Solving the Semiconductor Verification Crisis: From Problem to Productivity

Functional Verification Study - 2022

The Three Pillars of Intent-Focused Insight

Trends in Functional Verification

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July 2025

Aerospace & Defense
Functional Safety Jul 01, 2025 Reference

June 2025

Questa One Smart Verification: Unleashing the Potential of AI Within Functional Verification
Verification Academy Live Jun 05, 2025 Rebecca Echegaray pdf
Functional Verification Workflow for Trusted and Assured Microelectronics & Questa One Overview
Verification Academy Live Jun 05, 2025 David Landoll pdf
Ensure High Quality RTL with Early Continuous Integration
Verification Academy Live Jun 05, 2025 Walter Gude pdf
Enhancing Productivity in Simulation-Based Functional Verification
Verification Academy Live Jun 05, 2025 Sunil Sahoo pdf
Introduction and Agenda
Verification Academy Live Jun 05, 2025 Todd Holbrook pdf
VA Live - Huntsville, AL: Welcome
Verification Academy Live Jun 05, 2025 Todd Holbrook pdf
Questa One Smart Verification: Unleashing the Potential of AI Within Functional Verification
Verification Academy Live Jun 03, 2025 Rebecca Echegaray pdf
Functional Verification Workflow for Trusted and Assured Microelectronics & Questa One Overview
Verification Academy Live Jun 03, 2025 David Landoll pdf
Ensure High Quality RTL with Early Continuous Integration
Verification Academy Live Jun 03, 2025 Walter Gude pdf
Enhancing Productivity in Simulation-Based Functional Verification
Verification Academy Live Jun 03, 2025 Sunil Sahoo pdf
Introduction and Agenda
Verification Academy Live Jun 03, 2025 Todd Holbrook pdf
VA Live - Hudson, MA: Welcome
Verification Academy Live Jun 03, 2025 Todd Holbrook pdf

May 2025

Raising the Bar in Mission-Critical Verification: Aerospace and Defense Trends Analysis of FPGA Design Practices
FPGA Verification May 13, 2025 Harry Foster pdf
Raising the Bar in Mission-Critical Verification: Aerospace and Defense Trends Analysis of FPGA Design Practices
FPGA Verification May 13, 2025 Harry Foster Paper
Functional Safety for DO-254
Functional Safety May 13, 2025 Jake Wiltgen Product

February 2025

Smart Verification with AI/ML: Smart Regression & Smart Debug
Verification IQ Feb 06, 2025 Austin Mam pdf
Leveraging Trust and Security Analysis to Meet Design Assurance Requirements
Formal Verification Feb 06, 2025 David Landoll pdf
Integrating the Value of Questa Design Solutions in a Continuous Integration Development Flow
Questa Design Solutions Feb 06, 2025 Walter Gude pdf
Enhancing Productivity in Simulation-Based Functional Verification
Simulation Feb 06, 2025 Moses Satyasekaran pdf
VA Live - El Segundo: Introduction and Welcome
Verification Academy Live Feb 06, 2025 Todd Holbrook pdf

October 2024

Designing Secure and Performant Out-of-Order Processors Enabled by Formal Verification
Formal Verification Oct 17, 2024 Mohammad R. Faddideh - Stanford University mp4
Enverite PV-Bit: Bitstream Verification for FPGA Design Assurance
FPGA Verification Oct 17, 2024 Dr. Jonathan Graf mp4

September 2024

Universal Verification Methodology (UVM): VIP Challenges & Effective Deployment Guide
UVM - Universal Verification Methodology Sep 18, 2024 Jeffrey Jacobson - L3harris pdf
Questa Verification IQ: Boost Verification Predictability and Efficiency with Collaboration, Traceability, and AI/ML Analytics
Verification IQ Sep 18, 2024 Austin Mam pdf

1–25 of 110

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