Improving FPGA Safety and Security Compliance: FPGA Equivalence Checking from RTL to the Bitstream
Security and safety policies across various domains such as aerospace and defense, embedded security, and automotive safety have been updated to require an FPGA verification chain spanning from verified HDL source, extending throughout the FPGA implementation tool chain, and culminating with the FPGA bitstream. In this session, you will learn comprehensive solutions to tackle current and emerging requirements for FPGA designs.
