Power Aware/CDC simulations play an important role in System Resources block verification. The session discusses overcoming challenges in making the testbench work seamlessly across NON_PA and PA configurations. The challenges involve modeling the different domain powerup/powerdown behaviors to check if the signals are matching the respective domain. A struct based approach helps make the test bench scalable with the power domain added as one of the output features. Questa PA helps identify any issues if the signal is not matching the domain specified within the UPF. However to catch clock-domain crossing issues and missing synchronizers Questa CDC is needed and the paper discusses an integrated VMS approach for using Questa CDC.