With the complexity and interoperability needs of today's systems the use of standard interfaces such as PCIe and MIPI is a must. Verification of IP to implement these interfaces for re-use within a wide variety of systems can be time consuming and hard to get right. Users of IP are often faced with issues of integration and getting caught in the complex details of the IP implementation when their real goal is to verify design specific and system functionality. Verification IP is available to solve these issues, but too often comes with a high integration effort and a steep learning curve of its own that users must overcome before they can become truly productive. This presentation covers the use of modern verification IP for PCI Express and MIPI CSI and DSI implemented using industry standard SystemVerilog UVM that can be quickly integrated with a wide variety of IP allowing test re-use across both simulation and emulation while providing abstract user interfaces for rapid productivity. The session will show how to swiftly move through VIP instantiation, connection, configuration and protocol initialization so that you can rapidly achieve your verification objectives.
