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Reach the Finish Line Faster: How Questa One Speeds Total Simulation Turnaround Time
Paper - May 13, 2025 by Sunil Sahoo
Questa™ One Sim’s SmartCompile emerges as a strategic solution for reducing the overall verification timeline, offering a comprehensive set of tools that substantially reduce the turnaround time from initial compilation to final simulation. By integrating advanced capabilities with optimized coding style improvements, SmartCompile delivers a more efficient design flow that directly addresses the challenges of modern digital design development.
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Raising the Bar in Mission-Critical Verification: Aerospace and Defense Trends Analysis of FPGA Design Practices
Resource (Paper (.PDF)) - May 13, 2025 by Harry Foster
The insights presented in this report serve as a valuable benchmark for A&D organizations aiming to evaluate and enhance their verification maturity, technology adoption, and engineering resource alignment in response to evolving challenges.
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Raising the Bar in Mission-Critical Verification: Aerospace and Defense Trends Analysis of FPGA Design Practices
Paper - May 13, 2025 by Harry Foster
The 2024 Siemens EDA and Wilson Research Group Functional Verification Study provides an in-depth analysis of current trends in FPGA design and verification, with a particular focus on the aerospace and defense (A&D) sector. The study highlights the increasing complexity of FPGA designs driven by factors such as embedded processors, asynchronous clock domains, and stringent security and safety-critical requirements.
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Turning Vision into Reality: How Questa One Fulfills the Promise of Smart Verification
Resource (Paper (.PDF)) - May 13, 2025 by Harry Foster
In this white paper, you will learn how Questa One delivers a next-generation solution engineered to turn verification from a bottleneck into a competitive advantage.
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Turning Vision into Reality: How Questa One Fulfills the Promise of Smart Verification
Paper - May 13, 2025 by Harry Foster
Verification is no longer just a step in the design flow—it’s rapidly becoming the biggest barrier to innovation. In response, Siemens offers a transformative shift toward verification that is connected, data-driven, and scalable. Questa One delivers a next-generation solution engineered to turn verification from a bottleneck into a competitive advantage.
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Questa One Unified Coverage Solution: Transforming Verification Through Intelligence
Paper - May 13, 2025 by Vladislav Palfy
The Questa One unified coverage solution introduces a fundamentally different approach to verification coverage, combining systematic verification planning with intelligent assistance to achieve coverage goals faster and more predictably, thus transforming how teams work, enabling them to collaborate closer and focus their expertise where it matters most.
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Questa One Unified Coverage Solution: Transforming Verification Through Intelligence
Resource (Paper (.PDF)) - May 13, 2025 by Vladislav Palfy
This white paper walks through the landscape of semiconductor verification have reached a critical tipping point. What was once manageable through brute force — adding more tests, more compute power, more engineers have become an unsustainable approach.
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Intent Meets Implementation: Verifying Complex Power Strategies with UPF 4.0
Paper - May 13, 2025 by Chandu Challapalli
Questa One Sim PowerAware supports several of the most commonly used features available in UPF 4.0. This white paper takes a deep dive into UPF 4.0. What’s new, why it matters and how it fits into the evolving landscape of SoC design. We’ll start with a look at how UPF has grown over the years and why version 4.0 is a significant step forward for teams building large, power-aware systems. We'll also walk through practical tips and real-world challenges that teams face when rolling out UPF 4.0.
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Intent Meets Implementation: Verifying Complex Power Strategies with UPF 4.0
Resource (Paper (.PDF)) - May 13, 2025 by Chandu Challapalli
This white paper walks through practical tips and real-world challenges that teams face when rolling out UPF 4.0.
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Accelerated Assurance with Questa One Functional Safety
Paper - May 13, 2025 by Jake Wiltgen
Engineering teams face many challenges in achieving compliance with the ISO 26262 safety standard. To meet these and remain competitive, project teams must innovate and deploy best-in-class tools and workflows. The Questa™ One functional safety solution delivers on this mission through an integrated platform, along with safety-aware AI-powered verification engines, to enable a more streamlined and efficient approach to ISO 26262 compliance.
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Accelerated Assurance with Questa One Functional Safety
Resource (Paper (.PDF)) - May 13, 2025 by Jake Wiltgen
Engineering teams face many challenges in achieving compliance with the ISO 26262 safety standard. To meet these and remain competitive, project teams must innovate and deploy best-in-class tools and workflows.
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A Guide to SDC-based Timing Intent Verification with Questa One
Resource (Paper (.PDF)) - May 13, 2025 by Chandu Challapalli
SDC files play a critical role in defining how a digital design is expected to behave in time. Questa One Sim is an automated and comprehensive solution for SDC verification. It brings structure to SDC verification by combining static analysis, simulation-based checks, and formal validation in one environment.
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A Guide to SDC-based Timing Intent Verification with Questa One
Paper - May 13, 2025 by Chandu Challapalli
SDC files play a critical role in defining how a digital design is expected to behave in time. Questa One Sim is an automated and comprehensive solution for SDC verification. It brings structure to SDC verification by combining static analysis, simulation-based checks, and formal validation in one environment. That means teams can catch mistakes early, confirm that exceptions are used correctly, and make sure their constraints evolve in step with the RTL.
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Questa One Smart Verification: Unleashing the Potential of AI in Functional Verification
Resource (Paper (.PDF)) - May 13, 2025 by Darron May
Exploring the potential of AI in verification, this whitepaper delves into the specific challenges the industry faces, showcases innovative solutions being developed, and highlights the successes of early adopters who have embraced these cutting-edge technologies.
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Questa One Smart Verification: Unleashing the Potential of AI in Functional Verification
Paper - May 13, 2025 by Darron May
Exploring the potential of AI in verification, this whitepaper delves into the specific challenges the industry faces, showcases innovative solutions being developed, and highlights the successes of early adopters who have embraced these cutting-edge technologies. This transformative journey promises not only to enhance productivity but also to set the foundation for greater innovations in the future of functional verification.
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Accelerating DFT Sign-Off with Questa One
Resource (Paper (.PDF)) - May 13, 2025 by Jake Wiltgen
The rapid pace of technological advancement has created an unprecedented demand for highly reliable systems across a wide range of industries. In sectors such as safety critical systems, high-performance computing, and 3DIC, the need for utmost reliability is essential.
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Accelerating DFT Sign-Off with Questa One
Paper - May 13, 2025 by Jake Wiltgen
By leveraging advanced EDA technologies, companies can ensure that their products meet strict reliability requirements. DFT-aware static analysis, formal analysis, logic simulation, fault simulation, verification IP, and advanced debuggers equip teams to address verification challenges across technology scaling, design scaling, and system scaling. The Questa One DFT Verification solution delivers faster DFT sign-off and reduced time-to-market.
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Design for Test Verification
Solution - May 13, 2025 by
As semiconductor devices become increasingly complex and diverse, spanning automotive, AI/ML, 5G, and heterogeneous 3D-IC designs, Design-for-Test (DFT) verification plays a crucial role in ensuring not only high-test quality but also seamless integration with system-level requirements. While test insertion flows such as scan insertion, BIST/MBIST integration, and boundary scan logic have matured to deliver cost-effective, scalable test solutions, DFT verification remains a bottleneck that demands significant attention.
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Functional Safety
Solution - May 13, 2025 by
The goal of functional safety is to systematically identify, analyze, and mitigate risks associated with random hardware faults and systematic design errors. This requires a disciplined approach that encompasses detailed failure mode analysis, fault injection campaigns, robustness testing, and the implementation of dedicated safety mechanisms to detect and control faults during operation.
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Functional Safety for ISO 26262
Product - May 13, 2025 by Jake Wiltgen
As electronics become more integrated into daily life, especially in automotive applications, the demand for safer devices has grown. Modern vehicles feature advanced safety systems like lane keep assistance, blind spot detection, and forward collision warnings, with many aiming for Level 3 and 4 autonomy.
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Functional Safety for DO-254
Product - May 13, 2025 by Jake Wiltgen
DO-254 (Design Assurance Guidance for Airborne Electronic Hardware) is the industry standard for ensuring the safety, reliability, and compliance of airborne electronic hardware. DO-254 defines stringent design assurance requirements for FPGAs and ASICs used in airborne systems. Compliance ensures that these programmable and custom devices meet safety, reliability, and regulatory standards.
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Unified Coverage
Solution - May 13, 2025 by
In today's rapidly evolving semiconductor industry, verification teams face unprecedented challenges that traditional approaches can no longer address effectively.
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Enhancing Defect Coverage in Design for Testability (DFT) with Functional Fault Grading
Resource (Slides (.PDF)) - May 07, 2025 by Ann Keffer
This webinar will offer valuable insights into leveraging functional fault grading for robust and reliable system designs.
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Enhancing Defect Coverage in Design for Testability (DFT) with Functional Fault Grading
Webinar - May 07, 2025 by Ann Keffer
In this webinar, you will learn how functional fault grading enhances defect coverage and the key advantages of integrating functional fault grading into DFT processes, specifically addressing faults untestable by scan tests.
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Our Journey in Deploying Formal Register Checks with Questa Check Register
Resource (Slides (.PDF)) - May 01, 2025 by Thomas Thatcher - Rambus