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As I write this, it is autumn in New England, which means two things. First, the leaves are turning colors to make some of the most beautiful scenery to be found anywhere. Second, the leaves will be covering my lawn, which also means that I’ll have to remove them so I can cut the grass. I’ve lived in my house for over 20 years, and my standard leaf-removal method is to use the lawn mower, starting alongside the house, in ever-widening circles to cut the grass and blow the leaves and clippings out away from the house. We’re fortunate to live on a lot surrounded by conservation land, so we don’t have to worry about blowing things onto a neighbor’s property.

This method of leaf removal has served me adequately for many years, but the inefficiency has always bothered me. Due to the shape of our yard, I wind up going over areas that are already clear so that I can loop around to the back where there is more area to cover. So last year, I purchased a leaf blower. As the name implies, a leaf blower is a specialized power tool that blows a powerful jet of air strong enough to blow the leaves off the lawn, giving me a nice leaf-free lawn to mow, and standing the grass up so it cuts more evenly. So, even after 20 years of doing something the same way, the right technology can still improve your life. This issue of Verification Horizons will likewise give you some new tools to improve your verification efforts.

In our first article, my long-time friend and colleague Harry Foster shares his most recent survey data on “Quantifying FPGA Verification Effectiveness.” This is the latest installment of Harry’s series of biennial industry surveys that show how well we’re all doing when it comes to verifying FPGAs. As you’ll see, the study shows that projects that adopt so-called “advanced verification techniques” have fewer bugs escape into production, which is, after all, the whole point of verification.

Our next article, “Arasan MIPI® CSI-2-RX IP Verification Using Questa VIPs,” provides a case study of how Arasan used Questa® Verification IP (QVIP) to verify their MIPI Camera Serial Interface peripheral device.

We round out our articles from Mentor authors with “Memory Softmodels - The Foundation of Validation Accuracy.” This article focuses on the validation process, where we attempt to ensure that the design will perform as intended. Memory Softmodels provide a consistent configurable model that can be used in emulation and FPGA prototyping to let you measure important aspects of your design and run “real” software before the design is complete.

We open our Partners’ Corner section with a great discussion about “Increasing Functional Coverage by Automation for Zetta-Hz High Speed CDMA Transceiver” by our friends at Silicon Interfaces. This case study shows how they applied the coverage automation capabilities of Questa inFact to automate the generation of targeted testcases to ensure they could meet their coverage goals as efficiently as possible.

In “A Unified Approach to Verify Complex FSM,” our friends at eInfochips describe an innovative UVM-based approach to verifying complex finite state machines. By starting with a base class that defines the FSM states, they can extend that class to define constraints that either align with the intended FSM transitions or introduce errors to make sure that the FSM can handle them. Randomly generating scenarios along these paths can uncover some nasty bugs that might be hard to find otherwise.

Last but not least, Tessolve and InCore share with us their approach to a “RISC-V Design Verification Strategy.” With the incredible growth of RISC-V processors, which can be customized in so many ways, the question of how to ensure your core accurately implements your instruction set, and then verify that the core functions correctly in your application, is an ever-growing challenge. Fortunately, you can learn from their vast experience and apply these techniques to your own RISC-V design.

So whether you’re still “locked down” or are fortunate to be in an area where things are getting back to normal, I hope you’ll be able to take some time to enjoy the beauty of your autumnal surroundings. And whether you’re doing verification or yard work, don’t be afraid to try something new.

Respectfully submitted,

Tom Fitzpatrick
Editor, Verification Horizons