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March 2024 - Volume 20 Issue 1 (1)

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Show Less

February 2018

UVMF - Overview
UVM Framework Feb 26, 2018 Bob Oden pdf
UVMF - Series Introduction
UVM Framework Feb 26, 2018 Bob Oden pdf
UVM and C Tests: Perfect Together
UVM - Universal Verification Methodology Feb 26, 2018 Rich Edelman pdf

November 2017

Go Figure – UVM Configure: the Good, the Bad, the Debug
UVM - Universal Verification Methodology Nov 10, 2017 Rich Edelman pdf
UVM Connect 2.3.1 Primer
UVMC Nov 08, 2017 John Stickley pdf
UVM Connect 2.3.1 Primer
UVMC Nov 08, 2017 John Stickley tar
UVM Connect 2.3.1 Kit
UVMC Nov 07, 2017 John Stickley tar

October 2017

DO-254 for FPGAs
Functional Safety Oct 17, 2017 Alex Grove - Siemens Eda pdf
Coverage & Plan Driven Verification for FPGAs Session
Verification Management Oct 17, 2017 pdf
Regression Management and Dev Ops
Verification Management Oct 17, 2017 pdf
FPGA Verification Introduction
FPGA Verification Oct 17, 2017 pdf
Testbench Acceleration
Acceleration Oct 17, 2017 pdf
Advanced Verification for FPGAs
FPGA Verification Oct 17, 2017 Brian Mathewson pdf
Accelerating Coverage Closure
Coverage Oct 17, 2017 Mark Handover pdf
Measuring ISO 26262 Metrics of Analog Circuitry in ICs
Functional Safety Oct 10, 2017 Stephen Sunter - Siemens Eda pdf

September 2017

DAC 2013 Academy PDF Presentation: New Features in IEEE 1801-2013 - Mentor Graphics
Standards Sep 12, 2017 pdf
DAC 2013 Academy PDF Presentation: Intelligent Testbench Automation - Don't be Constrained - Mentor Graphics
Standards Sep 12, 2017 pdf
DAC 2012 Academy PDF Presentation: Verification of Low Power SoCs with IEEE UPF
Standards Sep 12, 2017 pdf
Basic UVM Code Examples
Standards Sep 12, 2017 zip
DAC 2012 Academy PDF Presentation: Bringing UVM to Life
Standards Sep 12, 2017 pdf
DAC 2013 Academy PDF Presentation: The New SystemVerilog 2012 Standard - Sunburst Design
Standards Sep 12, 2017 pdf
DAC 2013 Academy PDF Presentation: Power Aware Verification Getting Started with UPF - Mentor Graphics
Standards Sep 12, 2017 pdf
Productivity and Coverage in UVM Seminar - All Slides Zip
Standards Sep 12, 2017 zip
Guidelines for Crafting XLerated SystemVerilog OVCs
SystemVerilog Sep 12, 2017 pdf
DAC 2012 Academy PDF Presentation: Resistance is Futile - Learning to love UVM!
Standards Sep 12, 2017 pdf

New White Papers!

Formal, Avery VIP, Coverage, UPF, Functional Safety and More!

DV Digest on YouTube

AI is Changing Verification | Interview with Abhi Kolpekwar

VHDL Webinar

Wednesday, Nov 12th-8:00 AM PST

Don't Let VHDL Debugging Slow You Down! Use Questa One Sim

User2User

Nov. 19th | 0800 - 1630 US/Eastern

Mid-Atlantic 2025 | Johns Hopkins University | Laurel, Maryland

Debug Webinar

Wednesday, Dec 03rd-8:00 AM PST

VHDL Testbenches with OSVVM, UVVM, & UVM in Questa One Sim

Verification Academy Live

Scottsdale, AZ | Dec. 3rd - 9:30 - 5:00 US/MST | Top Golf

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