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December 2019 - Volume 15 Issue 3 (2)

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August 2012

Overview and Welcome
FPGA Verification Aug 30, 2012 Ray Salemi Session
Code Coverage
FPGA Verification Aug 30, 2012 Ray Salemi Session
Test Planning
FPGA Verification Aug 30, 2012 Ray Salemi Session

June 2012

Using the UVM Register Layer
UVM - Universal Verification Methodology Jun 22, 2012 John Aynsley pdf
Siemens EDA has Accellera's Latest Standard Covered
Coverage Jun 15, 2012 Darron May Article
Is Intelligent Testbench Automation For You?
Portable Stimulus Jun 15, 2012 Mark Olen Article
Automated Generation of Functional Coverage Metrics for Input Stimulus
Portable Stimulus Jun 15, 2012 Mike Andrews - Siemens Eda Article
Targeting Internal-State Scenarios in an Uncertain World
Portable Stimulus Jun 15, 2012 Matthew Ballance Article
On the Fly Reset
UVM - Universal Verification Methodology Jun 15, 2012 Mark Peryer Article
Relieving the Parameterized Coverage Headache
Coverage Jun 15, 2012 Bryan Ramirez Article
Better Living Through Better Class-Based SystemVerilog Debug
SystemVerilog Jun 15, 2012 Rich Edelman Article
Verification Horizons - Volume 8, Issue 2
Standards Jun 15, 2012 Tom Fitzpatrick pdf
Evolving Trends in Functional Verification
Planning, Measurement and Analysis Jun 01, 2012 Harry Foster pdf

May 2012

Introduction to UVM Connect
UVMC May 31, 2012 Adam Erickson Session
Connections
UVMC May 31, 2012 Adam Erickson Session
Converters
UVMC May 31, 2012 Adam Erickson Session
UVM Command API
UVMC May 31, 2012 Adam Erickson Session
UVM 1.1b Class Reference
UVM - Universal Verification Methodology May 21, 2012 html

February 2012

Verification Horizons - Volume 8, Issue 1
Standards Feb 01, 2012 Tom Fitzpatrick pdf

December 2011

UVM 1.1a Class Reference
UVM - Universal Verification Methodology Dec 01, 2011 html

November 2011

Verification Horizons - Volume 7, Issue 3
Standards Nov 01, 2011 Tom Fitzpatrick pdf

August 2011

Assertions for FPGA Designers
Assertions Aug 23, 2011 Cliff Cummings pdf
Advanced Debug with Questa
Debug Aug 01, 2011 pdf

June 2011

Verification Horizons - Volume 7, Issue 2
Standards Jun 01, 2011 Tom Fitzpatrick pdf

April 2011

Transforming Verification and Verification Management
Verification Management Apr 08, 2011 Tom Fitzpatrick Webinar

Verification IP Webinar

Wednesday, May 20th-8:00 AM PDT

Breaking Bandwidth Barriers in the AI Era: Scaling PCIe with Retimers and Optical Innovation

VA Live BRNO - Czech Republic

Thursday, May 21st | 9:00 AM - 3:15 PM CEST

The seminar will highlight recent advances in Questa One and the growing role of AI in verification workflows.

Security Verification Webinar

Wednesday, Jun 03rd-8:00 AM PDT

AI for Early SoC Security Verification

VA Live - Hudson, MA

Tuesday, June 9, 2026 | 9:00 AM - 5:00 PM EDT

This seminar empowers design engineers and verification teams with knowledge and tools for advanced AI automation and intelligent verification.

BUGGED OUT Podcast

Episode #4: Harry Foster talks with Vladislav Palfy about coverage closure.

DVCon Keynote

Beyond Bigger Designs: Rethinking Verification for the Era of Convergence

DVCon Workshop

Agentic AI for RTL Signoff: Gen AI for Chip Design Flows using Questa Toolkit

New White Papers

Agentic AI, Avery VIP, Coverage, Formal Verification, Functional Safety, UPF and More!

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