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September 2021 - Volume 17 Issue 2 (7)

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December 2019 - Volume 15 Issue 3 (3)

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December 2013

APB Protocol Monitor (.tgz)
Coverage Dec 04, 2013 Verification Methodology Team tar
What is Coverage
Coverage Dec 04, 2013 Verification Methodology Team Chapter
Wishbone SoC Testplan
Coverage Dec 04, 2013 Verification Methodology Team zip
System Level Functional Coverage Example
Coverage Dec 04, 2013 Harry Foster Chapter
APB3 Protocol Monitor
Coverage Dec 04, 2013 Harry Foster Chapter
Design For Analysis
Coverage Dec 04, 2013 Harry Foster Chapter
Coverage Cookbook
Coverage Dec 04, 2013 Harry Foster pdf

October 2013

Abstract UVM Stimulus
UVM - Universal Verification Methodology Oct 18, 2013 Tom Fitzpatrick Webinar
Abstract Concrete (.tgz)
UVM - Universal Verification Methodology Oct 07, 2013 tar

September 2013

The Need for Speed: Understanding Design Factors that Make Multi-core Parallel Simulations Efficient
Simulation Sep 19, 2013 Shobana Sudhakar Article

August 2013

UVM Register Model CSV Example
UVM - Universal Verification Methodology Aug 15, 2013 Tom Fitzpatrick tar
Automate UVM Register Models
UVM - Universal Verification Methodology Aug 15, 2013 Tom Fitzpatrick Webinar

June 2013

Monitors, Monitors Everywhere – Who Is Monitoring the Monitors
UVM - Universal Verification Methodology Jun 01, 2013 Rich Edelman Article

April 2013

A Simple UPF Example
Low Power Apr 08, 2013 Chuck Seeley Session
Introduction to Power Aware Verification
Low Power Apr 08, 2013 Erich Marschner Session
Functional Verification Study - 2012
Planning, Measurement and Analysis Apr 01, 2013 Harry Foster Session

March 2013

UVM 1.1d Class Reference
UVM - Universal Verification Methodology Mar 07, 2013 html

February 2013

System Level Code Coverage using Vista Architect and SystemC
Coverage Feb 22, 2013 Ken P. Mccarty - Siemens Eda Article
The Evolution of UPF: What’s Next?
Low Power Feb 22, 2013 Erich Marschner Article
Top Five Reasons Why Every DV Engineer Will Love the Latest SystemVerilog 2012 Features
SystemVerilog Feb 22, 2013 Ajeetha Kumari, Srinivasan Venkataramanan - Cvc Pvt. Ltd. Article
SVA in a UVM Class-based Environment
SystemVerilog Feb 22, 2013 Ben Cohen Article
OVM to UVM Migration, or “There and Back Again: A Consultant’s Tale”
UVM - Universal Verification Methodology Feb 22, 2013 Mark Litterick, Verilab Gmbh Article
Monitors, Monitors Everywhere – Who Is Monitoring the Monitors
UVM - Universal Verification Methodology Feb 07, 2013 Rich Edelman pdf
Monitors, Monitors Everywhere – Who Is Monitoring the Monitors
UVM - Universal Verification Methodology Feb 07, 2013 Rich Edelman Paper

January 2013

Improve AMS Verification Quality
Analog Mixed-Signal Jan 25, 2013 Ahmed Eisawy Session

New UVMF Release

The UVM Framework (UVMF) provides a jump-start for learning UVM and building UVM verification environments.

VA Live Seminar

Wednesday, November 6th | TopGolf | Austin, Texas

Missing Forum Notifications?

Check out this blog post from Dave Rich on how to enable Forum Notifications.

Upcoming HBM4 Webinar

Wednesday, Oct 30th-9:00 AM PDT

Verifying the Next Generation High Bandwidth Memory Controllers for AI and HPC Applications

Upcoming Questa Webinar

Wednesday, Nov 13th-8:00 AM PST

Simplify Scripting Environment using Qrun Capabilities in QuestaSim

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