Released on March 25, 2021
Overview:
This web seminar will describe the various productivity flows available in Questa. Additionally, it will introduce the advanced verification techniques and methodology necessary for design and verification of high-end FPGA and ASIC.
In this session, you will gain an understanding of the differences between the ModelSim and Questa simulators.
What You Will Learn:
- Differences between ModelSim and Questa simulators
- Productivity flows available in Questa
- Verification techniques and methodology for verifying high-end FPGA and ASIC
