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Webinar (210)
Intermediate (115)
Beginner (90)
Advanced (5)

210 Results

  • Advanced Verification for All: SV/UVM, UCIS, UPF Made Easy

    Webinar - Sep 09, 2016 by Gordon Allan

    In this session we will deliver five steps your team can take to improve first pass success, and how Questa enables your advanced verification goals every step of the way.

  • Staying Competitive with Advanced FPGA Verification

    Webinar - Aug 10, 2016 by Bryan Ramirez

    In this session you will learn about trends in the FPGA industry that are pushing the need for advanced verification.

  • UVM Framework – Create a UVM Environment in Less than an Hour

    Webinar - Nov 25, 2015 by Bob Oden

    In this session you will learn how the UVM Framework delivers reuse from block to chip to system in simulation and emulation and how to reduce your verification schedule by at least four weeks on every project.

  • Leveraging Verification IP (VIP) for Fast & Efficient Verification

    Webinar - Nov 25, 2015 by Jason Polychronopoulos

    In this session you will learn how Verification IP (VIP) helps to overcome IP verification challenges.

  • Low Power Verification Techniques

    Webinar - Sep 23, 2015 by Ellie Burns

    This session highlights a "new school" low power methodology termed "successive refinement" that uses the strength of UPF in just such a structured approach.

  • New School Thinking for Fast and Efficient Verification Using EZ-VIP

    Webinar - Sep 02, 2015 by Jason Polychronopoulos

    The session will show how to swiftly move through VIP instantiation, connection, configuration and protocol initialization, covering the use of UVM based verification IP for protocols such as PCI Express and MIPI CSI and DSI.

  • New School Regression Control

    Webinar - Sep 01, 2015 by Darron May

    Getting the very best from your verification resources requires a regression system that understands the verification process and is tightly integrated with workload management and distributed resource management software. Both requirements depend on visibility into available software and hardware resources, and by combining their strengths, users can massively improve productivity by reducing unnecessary verification cycles.

  • Evolution of Debug

    Webinar - Aug 25, 2015 by Gordon Allan

    In this session, Gordon Allan takes a critical look at the past, present and future challenges for debug, exploring real world situations drawn from years of experience in SoC design and verification, and describing leading-edge techniques and compelling solutions.

  • New School Connectivity Checking

    Webinar - Jul 01, 2015 by Mark Eslinger

    This session discusses the use of a new school formal verification method which can be easily applied to solve the problem of connectivity checking with detailed case studies of how this formal app was used to automatically verify connectivity and accelerate the debug process.

  • New School Coverage Closure

    Webinar - May 29, 2015 by Mark Eslinger

    In this session, you will learn a new school formal verification method which automates the job of focusing coverage closure efforts.

  • UVM Rapid Adoption: A Practical Subset of UVM

    Webinar - Mar 31, 2015 by Tom Fitzpatrick

    This session focusses on defining a subset of the UVM base classes, methods, and macros that will enable engineers to learn UVM more quickly and become productive with using UVM for the verification of most types and sizes of digital designs modeled in VHDL, Verilog or SystemVerilog. You might be surprised at just how small of a subset of UVM is really needed in order to verify complex designs effectively with UVM.

  • Introduction to Questa X-Check

    Webinar - Dec 20, 2014 by Doug Smith

    In this session, you will learn how Questa X-Check finds sources of X in your design and identifies issues where X is propagated and corrupts properly initialized registers.

  • Introduction to Questa CDC

    Webinar - Nov 12, 2014 by Doug Smith

    In this session, you will learn how the Questa Clock-Domain Crossing (CDC) solution focuses on the interaction between these clock-domains.

  • Introduction to Questa CoverCheck

    Webinar - Oct 16, 2014 by Doug Smith

    In this session, you will learn how Questa CoverCheck automates and accelerates the process of code coverage closure.

  • Establishing a Company Wide Verification Reuse Library

    Webinar - Oct 15, 2014 by Bob Oden

    In this session, you will learn how to outline key characteristics of a reuse verification library and will outline a proven reuse methodology.

  • Navigating the Perfect Storm: New School Verification Solutions

    Webinar - Oct 15, 2014 by Tom Fitzpatrick

    This session introduces today’s trends and challenges in SoC design and verification and outlines a path for navigating this “perfect storm."

  • Verification and Debug: Old School Meets New School

    Webinar - Oct 15, 2014 by Rich Edelman

    You will learn how to use the best of old and new school debug techniques to find problems faster and to better answer “am I done yet”.

  • UVM Sequences in Depth

    Webinar - Aug 12, 2014 by Tom Fitzpatrick

    In this session, we will walk through the mechanics of setting up and executing Slave Sequences in a responder.In this session, we will walk through the mechanics of setting up and executing Slave Sequences in a responder. We will also walk through modeling an interrupt sequence and show how to have interrupt sequences running in conjunction with other stimulus sequences.

  • UVM: What's New, What's Next and Why You Care

    Webinar - Jun 25, 2014 by Tom Fitzpatrick

    This session will teach you everything you need to know about the future of UVM. We'll briefly cover the new features included in UVM1.2 and how to minimize their impact, and we'll identify the key subset of UVM features that will make your environment truly reusable from block to system-level verification while providing the ideal platform for integrating new solutions and standards.

  • UVM 1.2 is Coming, so be Prepared

    Webinar - May 15, 2014 by Tom Fitzpatrick

    In this session, you will learn everything you need to know about the future of UVM including new features, performance, backward-compatibility concerns and more.

  • Questa Verification IP, More than just a BFM

    Webinar - Feb 12, 2014 by Tom Fitzpatrick

    Today’s advanced UVM environments require more than a standard BFM to support environment reuse, randomized stimulus, generation of traffic scenarios, coverage collection, etc.

  • Abstract UVM Stimulus

    Webinar - Oct 18, 2013 by Tom Fitzpatrick

    In this session, you will be introduced to the abstract stimulus specification that provides more effective UVM tests that can be reused throughout your SoC flow.

  • Automate UVM Register Models

    Webinar - Aug 15, 2013 by Tom Fitzpatrick

    In this session, you will be introduced to the UVM Register Assistant that will show how to generate correct-by-construction register models and tests from a register specification.

  • Effectively Modeling and Analyzing Coverage

    Webinar - Nov 15, 2012 by Tom Fitzpatrick

    In this session, we will outline a comprehensive coverage strategy that will help you implement effective functional coverage for your project. We will begin with a discussion of the different kinds of coverage and explain how to go from a functional specification to a coverage model, ensuring that your coverage code gives results that are easy to interpret.

  • More UVM Registers

    Webinar - Sep 17, 2012 by Tom Fitzpatrick

    In this session, you will learn how to implement registers and score-boarding at the register layer.