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SystemVerilog: Performance Guidelines
1
Code Profiling
2
Loop Guidelines
3
Decision Guidelines
3.1
Short-circuit logic expressions
3.2
Refactoring logical decision logic
3.3
Refactoring arithmetic decision logic
3.4
Priority encoding
4
Task and Function Call Guidelines
4.1
In-Lining Code
4.2
Task And Functional Call Argument Passing
5
Class Performance Guidelines
5.1
Avoid Unnecessary Object Construction
5.2
Direct Variable Assignment Is Faster Than set()/get() Methods
5.3
Avoid Method Chains
6
Array Guidelines
6.1
Use Associative Array Default Values
7
Avoiding Work
8
Constraint Performance Guidelines
8.1
Other Constraint Examples
9
Covergroup Performance Guidelines
9.1
Bin Control
9.2
Sample Control
10
Assertion Performance Guidelines
10.1
Unique Triggering
10.2
Safety vs Liveness
10.3
Assertion Guards
10.4
Keep Assertions Simple
10.5
Avoid Using Pass And Fail Messages
10.6
Avoid Multiple Clocks
