|
Advantage of TLM fifo over a mailbox
|
|
5
|
19655
|
December 29, 2025
|
|
Semaphore put method question
|
|
5
|
434
|
December 28, 2025
|
|
Deleting elements returned via Array locator methods
|
|
1
|
48
|
December 28, 2025
|
|
Time does not strictly flow forward
|
|
3
|
91
|
December 27, 2025
|
|
Execution of action block in Abort properties (reject_on / accept_on)
|
|
3
|
86
|
December 27, 2025
|
|
Confusion with the master monitor and slave monitor functionality
|
|
3
|
100
|
December 22, 2025
|
|
Displaying associative array elements in Specific order
|
|
2
|
68
|
December 18, 2025
|
|
UVM 1.2 new warning - a resource with meta characters in the field name has been created
|
|
12
|
7335
|
December 18, 2025
|
|
SVA to check a N-stage synchronizer output
|
|
9
|
103
|
December 18, 2025
|
|
UVM FACTORY Example Usage
|
|
2
|
127
|
December 18, 2025
|
|
Iterator index querying example clarification
|
|
4
|
63
|
December 14, 2025
|
|
Is it possible to use function in assertion but variable widths of the function variables are parameters?
|
|
1
|
77
|
December 12, 2025
|
|
Updated Example Code from DVCon Paper: The Missing Link: The Testbench to DUT Connection
|
|
2
|
9894
|
December 12, 2025
|
|
Connection using modports with different signals
|
|
6
|
70
|
December 12, 2025
|
|
AXI, Out of order
|
|
3
|
569
|
December 10, 2025
|
|
Virtual Register
|
|
1
|
88
|
December 10, 2025
|
|
Restrictions on fork join_any / join_none
|
|
1
|
125
|
December 10, 2025
|
|
How statements connect to the event scheduler, race condition time
|
|
1
|
51
|
December 9, 2025
|
|
Integer dynamic array sum constraint not working
|
|
5
|
186
|
December 9, 2025
|
|
Difference between always and always_comb
|
|
3
|
760
|
December 8, 2025
|
|
I want the classification which are from where?
|
|
1
|
65
|
December 8, 2025
|
|
Deep copy using shallow copy
|
|
1
|
77
|
December 6, 2025
|
|
Significance of 'contxt' Argument for create() functions of uvm_component_registry N uvm_object_registry
|
|
2
|
1170
|
December 6, 2025
|
|
[Interview Question] Writing a monitor for a given scenario below
|
|
6
|
495
|
December 6, 2025
|
|
Once a certain sequence occurs that another seq shouldn't occur till simulation ends
|
|
8
|
676
|
December 4, 2025
|
|
SV Constraint Challenge
|
|
13
|
333
|
December 4, 2025
|
|
How to set_inst_override_by_type a uvm_reg
|
|
7
|
114
|
December 4, 2025
|
|
Adding and deleting elements of dynamic type at same time
|
|
2
|
85
|
November 29, 2025
|
|
VIP based verification
|
|
2
|
132
|
November 27, 2025
|
|
Force a bunch of internal signals when there another particular signal goes high
|
|
2
|
55
|
November 27, 2025
|