In this course you will learn about formal coverage metrics which can be used to determine when verification on a design block is complete.
In this course you will learn specific verification challenges and their corresponding formal application.
This course introduces basic concepts and terminology that should be useful by any engineer wishing to mature their formal-based technology skills.
This course describes the low power CDC methodology by discussing the low power CDC challenges, describing the UPF-related power logic structures relevant to CDC analysis, and explaining a low power CDC verification methodology.
This course directly addresses these issues by introducing a set of steps for advancing an organization's clock-domain crossing (CDC) verification skills, infrastructure, and metrics for measuring success while identifying process areas requiring improvement.