Latest UVM topics - Verification Academy

Topic	Replies	Views	Activity
Memory usage keeps increasing as test runs UVM	5	94	April 4, 2024
UVM severity override from UVM_INFO to UVM_ERROR and UVM_VERBOSITY == UVM_NONE	2	69	April 4, 2024
Read data driving issue in reactive slave of AHB	2	73	April 4, 2024
Uvm_mem reference codes RAL-UVM	2	127	April 4, 2024
UVM run_test Method SystemVerilog	2	70	April 3, 2024
Reuse non-UVM classes in UVM environment UVM	4	87	April 3, 2024
Scoreboard for 2x2 router	5	121	April 2, 2024
How to build a reference model for uvm_scoreboard which perform multi-stage calculation SystemVerilog	0	80	March 30, 2024
Is it valid to pass uvm_component parameter while creating instance of a sequence? uvm_sequence , seq	6	93	March 30, 2024
Is it better to have 1 generic transaction or several specific ones?	0	61	March 29, 2024
Using non-UVM agents in a UVM environmet UVM , hierarchy , configdb , agent	1	1227	March 28, 2024
"Undefined module: <interface> was used. Port connection rules will not be checked at such instantiations." SystemVerilog , UVM , configuration , virtual-interface , interface	2	59	March 27, 2024
Reset : Control the number of transactions UVM	1	68	March 26, 2024
Disable Sequencer Sequence UVM	1	71	March 26, 2024
Usage : `uvm_do vs `uvm_send UVM	1	95	March 26, 2024
What kind of phase is run?	1	89	March 22, 2024
Async FIFO Scoreboarding Logic scoreboard , fifo	1	137	March 25, 2024
Bad handle or reference	2	46	March 25, 2024
$Countones in a 2 dimensional array SystemVerilog , constraint-randomization	3	163	March 22, 2024
Uvm reset during normal transaction UVM	1	124	March 21, 2024
Monitor to test connection UVM	3	80	March 19, 2024
Disable randomization after generating first time	3	98	March 19, 2024
Providing the RAL with protocol layer implemented with virtual sequence/sequencer virtual-sequencer , uvm-ral	1	71	March 18, 2024
Question on response_handler arguments	2	88	March 17, 2024
2 process writing on an analysis port from monitor UVM , analysis-port , UVM-monitor , uvm_monitor-uvm_scoreboard-write	11	760	March 18, 2024
Dynamic Reset verification in UVM	3	165	March 16, 2024
Question regarding uvmf_in_order_scoreboard_array and uvmf_out_of_order_scoreboard UVM	1	433	May 23, 2022
CLOCK not generating in top dual-top-modules	1	75	March 15, 2024
How to use get_full_hdl_path for the register RAL	0	74	March 15, 2024
Start_phase_sequence	1	84	March 12, 2024