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November 2018 - Volume 14 Issue 3 (4)

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July 2023 - Volume 19 Issue 2 (3)

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December 2016

The Fundamental Power States for UPF Modeling and Power Aware Verification
Low Power Dec 14, 2016 Progyna Khondkar pdf
The Fundamental Power States for UPF Modeling and Power Aware Verification
Low Power Dec 14, 2016 Progyna Khondkar Paper
What Is CDC Protocol Verification, Prevent Bugs in Your Silicon
Clock-Domain Crossing Dec 05, 2016 Kurt Takara Webinar
What Is CDC Protocol Verification, Prevent Bugs in Your Silicon
Clock-Domain Crossing Dec 05, 2016 Kurt Takara pdf
How to Shorten Your Schedule with Interactive Formal Debug and Design Exploration
Formal Verification Dec 05, 2016 Mark Eslinger Webinar

November 2016

FPGA Prototyping: Maximize Your Enterprise Debug Productivity
Debug Nov 11, 2016 Stephen Bailey Webinar
Industry Trends in Today’s Functional Verification Landscape
Planning, Measurement and Analysis Nov 11, 2016 Harry Foster Webinar
Enterprise Verification Debug and Analysis
Debug Nov 11, 2016 Stephen Bailey Webinar
System Level Debug & Analysis
Debug Nov 11, 2016 Gordon Allan Webinar
Enterprise Debug for Formal
Formal Verification Nov 11, 2016 Joe Hupcey Webinar
Enterprise Debug for Simulation
Debug Nov 11, 2016 Moses Satyasekaran Webinar
How to Get the Maximum Out of Your Assertion and Coverage Based Verification Methodology
Assertions Nov 07, 2016 Nitish Goel - Siemens Eda Article
USB Type-C Verification: Challenges & Solution
Verification IP Nov 07, 2016 Suraj Parkash Gupta, Zeeshan Yousuf - Siemens Eda Article
INs and OUTs of CAN Verification: A Comprehensive UVM-based Solution
Functional Safety Nov 07, 2016 Saumya Agrawal - Siemens Eda Article
24x7 Productivity: Veloce® Enterprise Server App Does the Job
Acceleration Nov 07, 2016 Vijay Chobisa Article
Power Aware Libraries: Standardization and Requirements for Questa Power Aware
Low Power Nov 07, 2016 Progyna Khondkar Article
Improving Performance and Verification of a System Through an Intelligent Testbench
Simulation Nov 07, 2016 Umesh Patel, Dhaval Shah - Arastu Systems Pvt. Ltd. Article

October 2016

Functional Verification Study - 2016
Planning, Measurement and Analysis Oct 14, 2016 Harry Foster Session

September 2016

Advanced Verification for All: SV/UVM, UCIS, UPF Made Easy
UVM - Universal Verification Methodology Sep 09, 2016 Gordon Allan Webinar

August 2016

Power Aware CDC Verification of Dynamic Frequency and Voltage Scaling (DVFS) Artifacts
Clock-Domain Crossing Aug 26, 2016 Kurt Takara Paper
Power Aware CDC Verification of Dynamic Frequency and Voltage Scaling (DVFS) Artifacts
Clock-Domain Crossing Aug 26, 2016 Kurt Takara pdf
Extending a Traditional VIP to Solve PHY Verification Challenges
Verification IP Aug 26, 2016 pdf
Beyond UVM Registers - Better, Faster, Smarter
UVM - Universal Verification Methodology Aug 25, 2016 Rich Edelman Paper
Beyond UVM Registers - Better, Faster, Smarter
UVM - Universal Verification Methodology Aug 25, 2016 Rich Edelman pdf
Total Recall - What to Look for in a Memory Model Library
Verification IP Aug 24, 2016 pdf

DAC 2025

Exhibitor Forum: Smart Verification for Modern Complexity

New White Papers!

Formal, Avery VIP, Coverage, UPF, Functional Safety and More!

User2User Mid-Atlantic 2025

Nov. 19th | 0800 - 1630 US/Eastern

Johns Hopkins University | Laurel, Maryland

osmosis Europe 2025

Thursday, October 16th, 2025 - Munich, DE

DV Digest on YouTube

AI is Changing Verification | Interview with Abhi Kolpekwar

Browse all content in Siemens Verification Academy with the tag HDL Domain

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