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    The Verification Academy offers users multiple entry points to find the information they need. One of these entry points is through Topic collections. These topics are industry standards that all design and verification engineers should recognize. While we continue to add new topics, users are encourage to further refine collection information to meet their specific interests.

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    The Verification Academy is organized into a collection of free online courses, focusing on various key aspects of advanced functional verification. Each course consists of multiple sessions—allowing the participant to pick and choose specific topics of interest, as well as revisit any specific topics for future reference. After completing a specific course, the participant should be armed with enough knowledge to then understand the necessary steps required for maturing their own organization’s skills and infrastructure on the specific topic of interest. The Verification Academy will provide you with a unique opportunity to develop an understanding of how to mature your organization’s processes so that you can then reap the benefits that advanced functional verification offers.

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    The Verification Academy Patterns Library contains a collection of solutions to many of today's verification problems. The patterns contained in the library span across the entire domain of verification (i.e., from specification to methodology to implementation—and across multiple verification engines such as formal, simulation, and emulation).

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    No one argues that the challenges of verification are growing exponentially. What is needed to meet these challenges are tools, methodologies and processes that can help you transform your verification environment. These recorded seminars from Verification Academy trainers and users provide examples for adoption of new technologies and how to evolve your verification process.

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  • About Verification Academy
    The Verification Academy will provide you with a unique opportunity to develop an understanding of how to mature your organization's processes so that you can then reap the benefits that advanced functional verification offers.

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  • Home
  • Verification Horizons
  • June 2017
  • Converting Legacy USB IP to a Low Power USB IP

Converting Legacy USB IP to a Low Power USB IP

Verification Horizons - Tom Fitzpatrick, Editor

Converting Legacy USB IP to a Low Power USB IP by Anand Paralkar and Pervez Bharucha - Silicon Interfaces

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Two common queries that customers pose to a design house is whether an existing or new IP can be made "low power" or if "power aware" verification can be carried out on an IP. The IEEE standard – P1801 captures what one may call the syntax and semantics to express the intent of the power architecture of a design. Merely adopting the standard (commonly known as the Unified Power Format) doesn't help. What it really takes to successfully achieve a low power design is design team know-how and a simulation tool that is geared towards low power implementation. This article captures how we use Mentor's Questa® Simulator to lower the power usage of our legacy USB IP. We also share how to start a low power implementation and provide some examples

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Table of Contents

Verification Horizons Articles:

  • What Does Improving Your Golf Swing Have in Common with Verification?

  • Parallel Debug: A Path to a Better Big Data Diaspora

  • Portable Stimulus Modeling in a High-Level Synthesis User's Verification Flow

  • Smoothing the Path to Software-Driven Verification with Portable Stimulus

  • Verification Planning with Questa® Verification Management

  • MIPI® CSI2 TX IP Verification Using Questa® VIPs

  • Converting Legacy USB IP to a Low Power USB IP

  • Understanding the UPF Power Domain and Domain Boundary

  • Automation and Reuse in RISC-V Verification Flow

  • Emulation – A Job Management Strategy to Maximize Use

  • RTL CDC Is No Longer Enough — How Gate-Level CDC Is Now Essential to First Pass Success

  • Formal Verification: Not Just for Control Paths

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