Faster Debug Using QuestaSim Interactive Coverage Analysis
This session we will explore the power of debugging code and functional coverage while simulation is still running. Learn how interactive coverage analysis brings another dimension to RTL and SV/UMV debugging which can lead to significant productivity boost and faster design and testbench bring up.
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Session Registration
https://event.on24.com/wcc/r/4903064/5E913C142DAA3762B6870C0E1A0B00E7
Date & Time
- Wednesday, April 16th
- 08:00 AM | US/Pacific
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Session Overview
In this webinar, we will explore the power of debugging code and functional coverage while simulation is still running. Learn how interactive coverage analysis brings another dimension to RTL and SV/UMV debugging which can lead to significant productivity boost and faster design and testbench bring up.
Reach issue resolution faster
- Inspect signals, transactions, code/functional coverage data in real time without waiting for the simulation to finish.
- Get immediate feedback on assertions, code coverage, and waveform anomalies enables quick fixes.
Achieve coverage closure more efficiently
- Interactively query code/functional coverage bins allows engineers to identify gaps quicker
- Tweak tests sooner to hit uncovered scenarios and boost coverage without re-running full regressions
In this webinar, we will also cover a few other new innovations in the QuestaSim coverage flow including next-gen code coverage engine and new block-to-top coverage merging.
What You Will Learn
- How interactive coverage analysis can speed up design and testbench bring up
- How to improve simulation speed by 28% without loss of code coverage fidelity
- A better way to merge block-to-top coverage with new QuestaSim utility
Who Should Attend
- Design and Verification Engineers
Products Covered
- QuestaSim and Visualizer