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Questa Lint vs Formal AutoCheck

Resource (Slides (.PDF)) - Jun 15, 2022 by Kevin Campbell

In this session, you will gain an understanding of the similarities and differences between Lint and Formal AutoChecking tools, and how they can be used together to increase the quality of RTL deliverables.
The Three Pillars of Intent-Focused Insight

Webinar - Jun 08, 2022 by Harry Foster

This session reviews the impact of today’s verification crisis, identifies the fundamental problem contributing to this crisis, and then prescribes a solution.
Advanced Debug Techniques

Track - May 23, 2022 by Rich Edelman

In this track, you will learn how the Visualizer Debug Environment can debug and verify your complex SoCs and FPGAs.
UVM Connect

Track - May 23, 2022 by Adam Erickson

UVM Connect will demonstrate how to reuse your SystemC architectural models and/or reuse SystemVerilog UVM agents to verify models in SystemC.
SystemVerilog OOP for UVM Verification

Track - May 23, 2022 by Dave Rich

The SystemVerilog OOP for UVM Verification is aimed at introducing the OOP features in SystemVerilog most commonly used by the UVM in the simplest form.
Verilog & VHDL Debug & Weeding

Resource (Verification Horizons Blog) - May 18, 2022 by Rich Edelman

Verilog and VHDL Debug can get tedious trying to find causality. In this BLOG we discuss automation that can improve your productivity.
Aerospace and Defense Verification Tech Day

Track - May 11, 2022 by Joe Hupcey

Join Siemens EDA as we share an engineering update on the methodologies, technologies, and solutions for the ASIC, FPGA, and systems verification challenges unique to today’s Aerospace and Defense industry. Design and verification engineers and managers serving the Aerospace and Defense industry won’t want to miss this deep dive into the future of digital verification.
Siemens and the US Government - Mitigating Microelectronics Development Challenges

Webinar - May 10, 2022 by Rich Powlowsky

In this session, you will learn how Siemens is a full solution provider to the fabless design community, including SoCs and Heterogeneous Integration from concept through GDSII sign off, through to the manufactured wafer and product life cycle.
Bringing Model-based Systems Engineering to IC and FPGA Design

Webinar - May 10, 2022 by Ray Salemi

In this session, you will learn how international competition has forced the change, how model-based design will change the way the Defense Industrial Base works with the DoD, and what all this means for IC verification.
From Model to Implementation with High-Level Synthesis

Webinar - May 10, 2022 by Russell Klein

In this session, you will learn how HLS can enable system verification in an MBSE flow, and how HLS can mitigate supply chain risks.
Accelerate Learning Curves and Achieve Program Goals Efficiently

Webinar - May 10, 2022 by Chris Giles

In this session, you will learn how Questa Design Solutions accelerates development learning and improves and instruments development efficiency by providing design quality insight early, then monitoring throughout development.
Create a UVM Testbench in a Day Using a Rapid, Repeatable Approach

Webinar - May 10, 2022 by Bob Oden

In this session, you'll learn how the UVM Framework and Questa Verification IP enables testbench creation in a day so the team can focus on creating tests and closing coverage.
How Automation Enables any RTL D&V Engineer to Run Exhaustive Formal Verification

Webinar - May 10, 2022 by Joe Hupcey

In this session, you will learn about the unique capabilities in Siemens EDA's formal solutions , then share a case study on how automated formal "unreachability" analysis can accelerate overall verification coverage closure via integration with QuestaSim.
Accelerate Development Using Advanced Debugging Approaches

Webinar - May 10, 2022 by Rich Edelman

In this session, you will learn how Visualizer Debug Environment provides a high-performance, high-capacity, tightly integrated debug environment for Simulation and Emulation.
Collaborative Verification Management & Coverage Analysis

Webinar - May 10, 2022 by Darron May

In this session, you will learn of the applications which comprise VIQ, which help manage all verification tasks including test plan creation, coverage analysis, regression management, and metric trending.
Securing the Electronics Development Chain with IC Integrity Solutions

Webinar - May 10, 2022 by John Hallman

In this session we will introduce apps that provide an automated assessment platform, perform processor verification, and offer completeness checking for this very complex IC integrity challenge.
System Level SoC Verification and Validation Using Emulation and Prototype Platforms

Webinar - May 10, 2022 by Vijay Chobisa

This session covers the Veloce Strato+ emulation platform, delivering fast execution speed, full debug visibility, flexible use models, and ease-of-use in models that span the entire range of needs throughout the life of the chip/SoC development process.
Trust but Verify Your IP with Solido Crosscheck

Webinar - May 10, 2022 by Felipe Schneider

This session will show Solido Crosscheck as the one-stop-shop solution for IP validation and QA accountability among IP designers and IP integrators.
Clearing the Fog of ISO 26262 Tool Qualification

Resource (Verification Horizons Blog) - Apr 13, 2022 by Jacob Wiltgen

Developing products to the ISO 26262 standard requires many activities across multiple disciplines. One of those activities is ensuring the tools deployed within the development are suitable for activities in the project. When we say suitable, we need to be confident that if a tool malfunctions, that failure will be caught before violating a safety requirement.
System Verification with MatchLib

Resource (Recording) - Mar 31, 2022 by Russell Klein
System Verification with MatchLib

Resource (Slides (.PDF)) - Mar 31, 2022 by
Formal 101: Learn Formal the Easy Way

Track - Mar 29, 2022 by Joe Hupcey

Everyone wants exhaustive verification, and thus people want to learn more about formal property checking flows and tools. But they either don’t where to start, or they are afraid that the learning curve will be protracted and confusing.
The Best Verification Strategy You’ve Never Heard Of

Resource (Slides (.PDF)) - Mar 28, 2022 by
The Best Verification Strategy You’ve Never Heard Of

Resource (Recording) - Mar 28, 2022 by
Key Findings of a Safety Critical Lifecycle Evaluation

Resource (Verification Horizons Blog) - Mar 25, 2022 by Trey Reeser - Siemens EDA

The demand for innovation continues to grow in safety-critical markets such as automotive, industrial, mil-aero, and medical. All Semiconductor companies that supply to these markets must address compliance and regulation to ensure their products operate correctly and fail safely throughout the operational life.