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Questa One Smart Verification: Unleashing the Potential of AI Within Functional Verification

Resource (Slides (.PDF)) - Jun 03, 2025 by Rebecca Echegaray

Leverage the power of AI and ML! Smart Verification revolutionizes functional verification by using faster engines that complement traditional heuristics with machine learning. Allow engineers to be more productive with advanced creation, analysis, and debugging capabilities, while reducing workloads through predictive technologies that streamline and accelerate the verification process.
Functional Verification Workflow for Trusted and Assured Microelectronics & Questa One Overview

Resource (Slides (.PDF)) - Jun 03, 2025 by David Landoll

Learn about the effectiveness of enhancing security verification and improving the robustness of your hardware security verification through detailed explanations and runtime insights. Explore methods to protect against data corruption using formal security verification techniques.
Questa One Avery VIP: Accelerated Confidence in Complex Protocol Verification

Resource (Paper (.PDF)) - Jun 03, 2025 by Gordon Allan

This paper describes specific verification challenges, showcases innovative solutions for real-world stimulus and hardware/software co-simulation, and highlights the value delivered to early adopters.
Questa One Avery VIP: Accelerated Confidence in Complex Protocol Verification

Paper - Jun 03, 2025 by Gordon Allan

Questa One Avery VIP’s cutting-edge technologies promise to enhance productivity and ease of use in the rapidly expanding landscape of complex interfaces and memory protocols, spanning SoC designs, 3D IC chiplets, and FW/SW integration. This paper describes specific verification challenges, showcases innovative solutions for real-world stimulus and hardware/software co-simulation, and highlights the value delivered to early adopters.
Ensure High Quality RTL with Early Continuous Integration

Resource (Slides (.PDF)) - Jun 03, 2025 by Walter Gude

Learn the value of Continuous Integration (CI) during development and how Questa Design Solutions are ideally suited for implementation in CI flows. Discover the benefits of integrating CI early to enhance RTL quality and streamline development processes.
Enhancing Productivity in Simulation-Based Functional Verification

Resource (Slides (.PDF)) - Jun 03, 2025 by Sunil Sahoo

Improving productivity has become crucial for efficiently utilizing expensive human and grid resources in the functional verification process. Achieving the "done" state requires more than simulator performance—it demands a strategic focus on optimizing workflows, prioritizing tasks, and leveraging metrics to guide efforts. A productivity-driven approach ensures resources are deployed effectively, accelerating verification closure.
Introduction and Agenda

Resource (Slides (.PDF)) - Jun 03, 2025 by Todd Holbrook

Verification Academy Live Introduction and Agenda.
VA Live - Hudson, MA: Welcome

Resource (Slides (.PDF)) - Jun 03, 2025 by Todd Holbrook

Welcome to Verification Academy Live.
Redefining Static and Formal Verification

Paper - May 29, 2025 by Chris Giles

Recent studies show that first-time silicon success is at an all-time low. It is therefore fair to question whether verification technologies and methodologies deliver the solutions that teams require. Simultaneously, new technologies such as AI yield exciting new opportunities to redefine verification methodologies. Siemens EDA delivers a transformative use of static and formal technologies, empowered by AI and new forms of automation.
Redefining Static and Formal Verification

Resource (Paper (.PDF)) - May 29, 2025 by Chris Giles

Siemens EDA delivers a transformative use of static and formal technologies, empowered by AI and new forms of automation. This provides much-needed new verification solutions that improve total user productivity by enabling faster engineers, delivering faster engines and optimizing development by requiring fewer workloads.
A Guide to UPF-based Power Intent Verification with Questa One

Paper - May 29, 2025 by Chandu Challapalli

This white paper takes a close look at the verification side of UPF with Questa One Sim Power Aware. The focus here is on how to confirm that the described power intent is correctly wired up, tested and functionally sound throughout the design flow. We’ll look at multiple verification approaches and review the tools and technologies offered by Questa One that help design teams close the loop on low-power verification.
A Guide to UPF-based Power Intent Verification with Questa One

Resource (Paper (.PDF)) - May 29, 2025 by Chandu Challapalli

This white paper takes a close look at the verification side of UPF with Questa™ One Sim Power Aware. The focus here is on how to confirm that the described power intent is correctly wired up, tested and functionally sound throughout the design flow.
DFT Verification: Tackling the Evolving Challenges

Resource (Verification Horizons Blog) - May 29, 2025 by Jake Wiltgen

Technological advancement continues as a blistering pace, and the demand for highly reliable systems is paramount across various industries. Safety critical systems and high-performance and heterogenous compute are just a sampling of end markets where customers require the utmost reliability.
Streamlining Requirements Traceability using Questa Verification IQ Testplan Author

Resource (Slides (.PDF)) - May 28, 2025 by Nishtha

In this webinar, you will learn how verification engineers can visualize complex requirement relationships at a glance, identify and address coverage gaps in real-time, and ensure comprehensive requirement implementation and testing.
Streamlining Requirements Traceability using Questa Verification IQ Testplan Author

Webinar - May 28, 2025 by Nishtha

In this webinar, discover how Questa Verification IQ Testplan Author seamlessly integrates with Application Lifecycle Management tools (such as Siemens Polarion and Jama Connect) to deliver a powerful, collaborative traceability solution that transforms your verification workflow.
Solving the Semiconductor Verification Crisis: From Problem to Productivity

Resource (Slides (.PDF)) - May 21, 2025 by Harry Foster

In this webinar, you will discover how a connected, data-driven, and AI-enhanced approach transforms verification into a proactive, scalable system built for 3D ICs, chiplets, and software-defined architectures—delivering higher quality, faster results, and greater productivity across your engineering team.
Solving the Semiconductor Verification Crisis: From Problem to Productivity

Webinar - May 21, 2025 by Harry Foster

The semiconductor industry is facing Verification Productivity Gap 2.0 —a crisis driven by mounting design complexity, growing security demands, and workforce shortages. Traditional verification methods alone can’t keep up. This webinar explores the latest industry trends and challenges shaping functional verification, then introduces Questa One —Siemens’ smart verification platform engineered to meet these demands head-on.
Enhanced Simulation Debugging through Advanced Capabilities of Visualizer

Conference - May 20, 2025 by Satish Banukumar

In this session, you will learn what was holding our Questa Classic users back from adopting Visualizer as their debugger, even though we are sold on the advanced capabilities and performance gains, our strategy to overcome this, and then close out the talk with Visualizer features that have worked well and improvements we hope to see.
Enhanced Simulation Debugging through Advanced Capabilities of Visualizer

Resource (Slides (.PDF)) - May 20, 2025 by Satish Banukumar

This session will start with the introduction of our DUT – the advanced robotic system -- and the corresponding design and verification challenges of constantly reuse code resulting from rapid growth in the last decade.
Functional Verification Using Siemens Questa Simulation Technologies

Resource (Slides (.PDF)) - May 20, 2025 by Nirmala Balakrishnan

In this session, you will learn how Tsavorite Scalable Intelligence harnessed the UVM Framework to automate testbench and make-file infrastructure generation and got them started quickly with QuestaSim regressions.
Functional Verification Using Siemens Questa Simulation Technologies

Conference - May 20, 2025 by Nirmala Balakrishnan

Working at the leading edge of AI Computing, with Chiplet architectures, advanced protocol and memory interfaces, it is essential that our IPs, DUTs, and functional Design Verification teams continue to scale up along with our product line and company. In this session, you will learn how Tsavorite Scalable Intelligence harnessed the UVM Framework to automate testbench and make-file infrastructure generation and got them started quickly with QuestaSim regressions.
Shift Left using AutoCheck Formal Verification

Conference - May 20, 2025 by Mitchell Poplingher

Automated applications with formal verification under-the-hood can truly enable a “shift left”, which will be shown in this presentation on Siemens' Questa AutoCheck. In this case study, we share how this complements our simulation-based RTL verification, as it offers distinct advantages in accelerating bug detection during early RTL development stages.
Shift Left using AutoCheck Formal Verification

Resource (Slides (.PDF)) - May 20, 2025 by Mitchell Poplingher

In this session we will demonstrate automated applications with formal verification under-the-hood can truly enable a “shift left”.
Addressing the Emerging Challenges in DFT Verification with QDX

Conference - May 20, 2025 by Jake Wiltgen

The rise of AI accelerators, coupled with multi-die integration and heterogeneous architectures, has driven unprecedented complexity in semiconductor design, making advanced DFT implementations essential to meeting increasingly rigorous quality requirements. In this session we will showcase exciting optimization results obtained by QDX flow in real customer designs.
Addressing the Emerging Challenges in DFT Verification with QDX

Resource (Slides (.PDF)) - May 20, 2025 by Jake Wiltgen

In this session we will showcase exciting optimization results obtained by QDX flow in real customer designs.