|
assertion to detect a specific switch of a signal
|
|
3
|
77
|
March 6, 2026
|
|
Upward references in bound interfaces
|
|
5
|
74
|
March 3, 2026
|
|
SVA on intersect
|
|
5
|
124
|
February 24, 2026
|
|
Iteration of elements in an array declared as randc
|
|
2
|
68
|
February 24, 2026
|
|
Default argument dimension & type in SV subroutines
|
|
1
|
33
|
February 21, 2026
|
|
SV Assertions practice questions
|
|
0
|
109
|
February 21, 2026
|
|
Assertion failure using strong property
|
|
7
|
99
|
February 19, 2026
|
|
SV Assertions using $past()
|
|
2
|
107
|
February 18, 2026
|
|
Working of $monitor
|
|
5
|
59
|
February 17, 2026
|
|
Equivalent expression for intersect operator
|
|
1
|
37
|
February 15, 2026
|
|
Formal arguments to properties / sequences
|
|
1
|
45
|
February 13, 2026
|
|
A query about push_back and pop_front
|
|
10
|
4006
|
February 12, 2026
|
|
Calling parent function via super is calling child class function
|
|
4
|
69
|
February 12, 2026
|
|
Read values are wrong in UART Verification
|
|
9
|
78
|
February 9, 2026
|
|
SVA sampling of always( a ##1 b[->1] )
|
|
6
|
72
|
February 8, 2026
|
|
Vending Machine in System Verilog
|
|
2
|
249
|
February 2, 2026
|
|
Scoreboard evaluating before monitor updates in SystemVerilog testbench (DFF)
|
|
1
|
82
|
January 29, 2026
|
|
Constraint Randomization Interview Question
|
|
22
|
5696
|
January 25, 2026
|
|
Evaluation of following Embedded Concurrent assertion
|
|
0
|
62
|
January 18, 2026
|
|
Interview question on constraint
|
|
24
|
12218
|
January 20, 2026
|
|
Assertion question :-
|
|
9
|
578
|
January 18, 2026
|
|
Full_case parallel_case concrete explanation needed
|
|
2
|
89
|
January 12, 2026
|
|
Constraint Pattern problem
|
|
5
|
188
|
January 10, 2026
|
|
SystemVerilog constraint: unique addr across array of structs without auxiliary array
|
|
3
|
129
|
January 9, 2026
|
|
How SV handles the execution of functions
|
|
1
|
75
|
January 9, 2026
|
|
Requesting clarity on constraint solving
|
|
2
|
109
|
January 7, 2026
|
|
Query on generating rand 2D array with sum of set bits equal to specific value and bits must be connected to each other
|
|
4
|
141
|
January 5, 2026
|
|
Assertion error
|
|
3
|
80
|
January 5, 2026
|
|
Using interface in testbench and for modules connection
|
|
1
|
65
|
January 5, 2026
|
|
Weighted constraints not working
|
|
3
|
95
|
January 2, 2026
|