Displaying all the parent nested tasks for the current running task

SystemVerilog
1

Hi all,

Is there a way to display the all the parent nested tasks for the current running task
For example, I am having task1 calling task2 which is calling task3

Is there a built in way in SV to display tb.task1.task2.task3 from inside task3
I tried $sformatf(“%m”), but it just displays tb.task3

My purpose is to find out which task calling is consuming the simulation time at a specific time or under some condition like timeout

Thanks

2

The IEEE 1800-2023 SystemVerilog LRM officially added the $stacktrace system task–many tools already support it in some form. Please check your tool’s User Manual