Coverage closure is a key step in any IP design verification project. Code coverage is a much-needed metric in most modern-day IP designs. It helps teams to ensure that all RTL code written is indeed exercised and verified prior to tape-out. Without such a guarantee, a semiconductor design house may well be risking millions of dollars in a potential bug-escape to silicon. As the process of code coverage is well automated, it is widely used in the industry.
One of the challenges in coverage closure is the time taken to get to 100% with potential waivers/exclusions. Traditionally, teams have deployed a battery of RTL designers to review each and every uncovered item to ensure it is indeed a genuine hole and can be safely