RTL CDC is No Longer Enough: How Gate-Level CDC is Now Essential to First Pass Success
Clock-domain crossing (CDC) verification is a critical step in the design verification cycle. However, CDC verification is not only necessary on RTL; at 28nm nodes and below it is also essential on gate-level designs due to the possibility of the introduction of CDC errors during the synthesis phase that can lead to silicon failure. In this article we review the root cause of these challenges and introduce an automated approach to overcome these difficulties.
Full-access members only
Register your account to view RTL CDC is No Longer Enough: How Gate-Level CDC is Now Essential to First Pass Success
Full-access members gain access to our free tools and training, including our full library of articles, recorded sessions, seminars, papers, learning tracks, in-depth verification cookbooks, and more.