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INTRODUCTION
The EDA industry is increasingly avaricious for the benefits of big data. While functional verification has been a producer of big data for several years, paradoxically, big data analysis adoption may not have progressed as quickly as it could have due to a shortage of big data consumers. Most verification engineers have participated in a project where EDA big data was ignored until near the end of the project—if it was gathered at all—at which point there was a mad dash to complete coverage closure.
This article describes a methodology—parallel debug—as well as a supporting Jenkins framework, enabled by the availability of massive processor and disc farms which are commonplace among chip design projects. Parallel debug is an
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