Please login to view the entire Verification Horizons article.
Please register or login to view.
by Kaowen Liu, MediaTek Inc., and Roger Sabbagh, Mentor Graphics
Introduction
Unknown signal values in simulation are represented as X-state logic levels, while the same X-states are interpreted as don't care values by synthesis. This can result in the hazardous situation where silicon behaves differently than what was observed in simulation. Although the general awareness of X-state issues among designers is good, gotchas remain a risk that traditional verification flows are not well equipped to guard against. The unknown simulation semantics of X has two oft discussed pitfalls: X-pessimism and X-optimism[1][2][3].
X-optimism is most worrisome as it can mask true design behavior by blocking the propagation of X-states and instead
...