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    The Verification Academy offers users multiple entry points to find the information they need. One of these entry points is through Topic collections. These topics are industry standards that all design and verification engineers should recognize. While we continue to add new topics, users are encourage to further refine collection information to meet their specific interests.

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    The Verification Academy is organized into a collection of free online courses, focusing on various key aspects of advanced functional verification. Each course consists of multiple sessions—allowing the participant to pick and choose specific topics of interest, as well as revisit any specific topics for future reference. After completing a specific course, the participant should be armed with enough knowledge to then understand the necessary steps required for maturing their own organization’s skills and infrastructure on the specific topic of interest. The Verification Academy will provide you with a unique opportunity to develop an understanding of how to mature your organization’s processes so that you can then reap the benefits that advanced functional verification offers.

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    The Verification Community is eager to answer your UVM, SystemVerilog and Coverage related questions. We encourage you to take an active role in the Forums by answering and commenting to any questions that you are able to.

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    The Verification Academy Patterns Library contains a collection of solutions to many of today's verification problems. The patterns contained in the library span across the entire domain of verification (i.e., from specification to methodology to implementation—and across multiple verification engines such as formal, simulation, and emulation).

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    Find all the methodology you need in this comprehensive and vast collection. The UVM and Coverage Cookbooks contain dozens of informative, executable articles covering all aspects of UVM and Coverage.

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  • All Events
    No one argues that the challenges of verification are growing exponentially. What is needed to meet these challenges are tools, methodologies and processes that can help you transform your verification environment. These recorded seminars from Verification Academy trainers and users provide examples for adoption of new technologies and how to evolve your verification process.

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  • About Verification Academy
    The Verification Academy will provide you with a unique opportunity to develop an understanding of how to mature your organization's processes so that you can then reap the benefits that advanced functional verification offers.

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  • Home
  • Verification Horizons
  • December 2019
  • Don’t Forget the Protocol! A CDC Protocol Methodology to Avoid Bugs in Silicon

Don’t Forget the Protocol! A CDC Protocol Methodology to Avoid Bugs in Silicon

Verification Horizons - Tom Fitzpatrick, Editor

Don’t Forget the Protocol! A CDC Protocol Methodology to Avoid Bugs in Silicon Abdelouahab Ayari, Sukriti Bisht, Sulabh Kumar Khare, Ashish Hari, and Kurt Takara - Mentor, A Siemens Business

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INTRODUCTION

Today’s complex designs include multiple asynchronous clocks and the signals crossing between asynchronous clock-domains may result in functional errors. When a signal from one asynchronous clock-domain is sampled by a register on a different asynchronous clock-domain, the setup/hold timing requirement will be violated for the destination register. The setup/hold timing violation indicates that the destination register may become metastable and that the destination register will settle to an unpredictable value and possibly cause a functional error. Although clock-domain crossing (CDC) verification is a critical task in design verification projects, many design teams only statically verify CDC synchronization structures.

When

...

Table of Contents

Verification Horizons Articles:

  • Lessons from “Verifying” the Harry Potter Franchise

  • Why Hardware Emulation Is Necessary to Verify Deep Learning Designs

  • Deadlock Prevention Made Easy with Formal Verification

  • Exercising State Machines with Command Sequences

  • Designing A Portable Stimulus Reuse Strategy

  • Don’t Forget the Protocol! A CDC Protocol Methodology to Avoid Bugs in Silicon

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