How Static and Dynamic Failure Analysis Can Improve Productivity in the Assessment of Functional Safety
In this article, we present a working example, implemented using the Questa Verification Platform where a 32-bit RISC V CPU has been subjected to an extensive static and dynamic failure analysis process, as a part of a standard-mandated functional safety assessment.
Full-access members only
Register your account to view How Static and Dynamic Failure Analysis Can Improve Productivity in the Assessment of Functional Safety
Full-access members gain access to our free tools and training, including our full library of articles, recorded sessions, seminars, papers, learning tracks, in-depth verification cookbooks, and more.