1. Session Registration

    Session Registration

    Date and Time

    • Wednesday, March 5th
    • 8:00 AM US/Pacific
  2. Session Overview

    Debugging testbenches can be a time-intensive challenge, but modern tools provide advanced features to simplify and accelerate the process.

    This webinar will explore essential capabilities such as basic line stepping, dynamic variable monitoring, constraint debugging, and UVM topology visualization.

    Attendees will learn how to effectively identify and resolve issues in complex testbenches, streamline workflows, and enhance overall verification efficiency.

    Discover practical techniques and tools to improve productivity while navigating the increasing complexity of today’s designs.

    What You Will Learn

    • Debugging Complex Testbenches
    • Constraint Debugging
    • UVM Debug and Visualization
    • Dynamic Variable Monitoring

    Who Should Attend

    • Verification Engineers who use QuestaSim and Visualizer

    Products Covered

    • QuestaSim
    • Visualizer