Released on November 18th, 2021.
When smart embedded and software-intensive electronics systems interact with the physical world they have the potential to endanger human lives or to cause significant damage, and are considered safety-critical. To avoid any unreasonable risk originating from the failure of such systems, stringent development processes based on safety engineering practices and safety standards are followed. This webinar explains the methodology and flow of how to model fault simulation on SoCs or IP with a combination of hardware and software safety mechanisms. It also describes how Arm used our analysis tool to get accurate metrics early in the safety workflow to understand if their design reached their safety target and how they used exploration and what-if-analysis to guide them to an optimal safety architecture for their design.
This session explains the methodology and flow of how to perform an accurate safety analysis, followed by fault simulation on the SoC or IP with a combination of hardware and software safety mechanisms.
What You Will Learn:
- About real-life development processes based on safety engineering practices and safety standards to achieve ISO 26262 certification
- How you can leverage Arm’s methodology using Siemen’s analysis tool SafetyScope™ to achieve an optimal safety architecture early in the workflow to accelerate your ISO 26262 certification
Who Should Attend:
- Design & Verification Engineers & Managers and those interested in Functional Safety Protocols