Released on May 21st, 2020
Regardless of the verification engine, Visualizer provides both Interactive and Off-Line debug, featuring Hardware and Software Views of everything from transactions down to transistors, including software-driven verification.
What You Will Learn:
- How Visualizer provides debug visibility without compromising simulation performance
- How you can debug using high level abstractions like classes, transactions, assertions, coverage, biometric search, automated temporal causality trace and more
- How you can tackle complex UVM testbench challenges in Post (Class in waveform, schematic view …) and Live Sim mode (breakpoints …)
