For decades, software-driven tests have been the accepted methodology for testing hardware integration of processor-containing SoCs. Software-driven hardware tests are portable, enabling the same tests to run in simulation, emulation, and real silicon. While block-level tests are typically transaction-focused, software-driven tests are more about scenarios.
So, what’s new? Well, today, the need for raising the abstraction level and using automation to create reusable tests extends far beyond creating SoC integration C tests. Comprehensive scenario-based tests are critical at block, subsystem, and SoC level. Test reuse is still important between simulation, emulation, and post-silicon, but also across environments – for example reuse of tests for an algorithm used as input to high-level synthesis and the resulting RTL output from a high-level synthesis tool. In this session, you will learn how graph-based portable stimulus raises the abstraction level of test specification and execution, and enables tests to be retargeted across environments and execution platforms.
