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  • Introspection Into SystemVerilog Without Turning It Inside Out

Introspection Into SystemVerilog Without Turning It Inside Out

Author:

  • Dave Rich - Mentor Graphics

Abstract:

Many times design engineers need to analyze their code beyond looking at simple functional behavior. How many bits of memory are in this design? How many places does the clock signal fan out to? And verification engineers need to dynamically modify their tests based on the result of the same kind of analysis. There are separate tools that provide some of this kind of analysis, and there is a programming language interface to write almost any application in C. but it would be much easier if SystemVerilog provided introspection – the ability to ask questions about your code from within your code. This paper presents a mechanism to add introspection using the existing DPI/VPI in an importable package along with an example of its use.

Introduction:

In computer science, introspection in a programming language gives a program the ability to query information about itself. The key is being able to ask these question from within the program itself and act on that information. The motivation behind adding introspection to a language varies, but usually falls into one of these major categories:

  • Linting: Error checking and conformity by providing information about poorly written and problematic code.
  • Dynamic program modification: Making run-time decisions about a program based on characteristics of that program.
  • Statistic reporting: Providing program characteristics for analysis and interfacing with other tools.

Most programming languages have very few of these capabilities natively. For example, most languages can only tell you the filename and line number of the current line of code you are executing. This comes in handy for message reporting while debugging your code. There are also various methods that give you information about the size of an array, as well as the range of indexes. These are all the capabilities SystemVerilog has built in to its language natively.

For anything beyond these simple queries, SystemVerilog provides a Verification Programming Interface providing access to a C program to query most aspects of a SystemVerilog description. But this is outside the native language and must be written in C/C++. The VPI mechanism was originally designed for tool developers integrating other tools into existing Verilog simulators. Over time, the VPI became a modeling interface integrating functionality implemented in C with functionality implemented in Verilog. However, this interface is cumbersome for people who are hardware model developers and not tool developers.

SystemVerilog [1] has a much simpler modeling interface, the Direct Programming Interface, addressing integrating C models with SystemVerilog. This allows code in one language to be called from code in another language without either being aware the code was called from another language. However, the DPI does not provide any of the design query features of the VPI.

Adding introspection to SystemVerilog natively may be a formidable task in this stage of the language's evolution. This paper provides an alternative using existing elements of SystemVerilog that achieve the same goals through a package. By combining the capabilities of the VPI with the DPI, it is possible to make design query routines appear as if they were native introspection routines to SystemVerilog. This has the benefit of eliminating the need for C programming expertise in the development of introspection-like applications.

View & Download:

Read the entire Introspection Into SystemVerilog Without Turning It Inside Out technical paper.

Source:

DVCon US 2016

  Introspection Into SystemVerilog Without Turning It Inside Out
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