Topics tagged uvm

Topic	Replies	Views	Activity
How to end background reg access sequences gracefully UVM SystemVerilog , testbench , uvm_sequence	1	93	September 11, 2024
Do we need get_full_name() in sequence item creation? If so, why? UVM UVM , uvm_sequence , UVM_CREATE-UVM_SEQUENCE , get_full_name , uvm_sequence-body	3	1341	August 8, 2024
Is it valid to pass uvm_component parameter while creating instance of a sequence? UVM uvm_sequence , seq	6	242	March 30, 2024
Uvm_sequence randomization UVM UVM , uvm_sequence , randomization	4	1426	April 24, 2023
Uvm_sequence without #(seq item) UVM UVM , uvm_sequence	2	684	March 4, 2023
Neither the item's sequencer nor dedicated sequencer has been supplied to start item in m_bseq UVM UVM , uvm_sequence , UVM-sequencer-p_sequencer , start_item-in-the-extended-class	4	2585	February 19, 2023
Fork join threads in a sequence body UVM UVM , uvm_sequence , fork_join , thread-fork	4	1044	February 17, 2023
Adding additional ports to driver/sequencer pair UVM UVM , uvm_sequence , uvm_sequencer , uvm-uvm_driver- , UVM-DRIVER-INTERFACE	1	608	November 10, 2022
Uvm sequence stop isn't working UVM UVM , uvm_sequence	3	714	May 3, 2022
Concurrent calls to get_next_item() not supported. Consider using a semaphore to ensure that concurrent processes take turns in the driver UVM UVM , sequencer , uvm_sequence , fork-join	1	1633	December 21, 2020
Two different logic in single driver UVM UVM , uvm_sequence , uvm-uvm_driver	8	1255	November 16, 2020
Sending Value from Driver to Sequence UVM UVM , uvm_sequence , uvm-uvm_driver-	1	745	October 10, 2020
Incompatible class assignment error UVM UVM , uvm_sequence , ParameterizedClass	3	1397	September 25, 2020
UVM clock Agent UVM UVM , uvm_sequence , uvm-interface , uvm_agent , systemverilog-interface	7	4057	December 5, 2019
How to access a variable which is in driver or scoreboard (or any classes derived from uvm_components) from sequence class? UVM UVM , uvm_sequence	1	1332	July 14, 2019
How to use wait fork statement in nested fork join_none block SystemVerilog SystemVerilog , uvm_sequence , fork-join_none-multiple-threads , fork-join	2	3359	May 31, 2019
The best way to start/select sequence(s) in a test class UVM UVM , uvm_sequence , Cookbook-SequencesVirtualSequencer , Cookbook-Sequences , Cookbook-SequencesVirtual , Cookbook-SequencesAPI	4	3655	July 9, 2018
Preventing a particular sequence to execute of the parent class from the Child class UVM UVM , Method-Overriding , uvm_sequence	1	1177	June 21, 2018
$time in sequence UVM UVM , uvm_sequence , time	2	1757	June 21, 2018
Hidden arguments when calling sub-sequence's task UVM UVM , uvm_sequence , Calling-Sequence-inside-a-sequence , hierarchical-task-call	7	2315	March 14, 2018
Question related to uvm_sequence input UVM UVM , uvm_sequence_item , uvm_sequence	1	1283	March 12, 2018
Can I pass variable from uvm_sequence to test class? UVM UVM , config_db , uvm_sequence , UVM-uvm_test	2	1465	February 22, 2018
How to randomly pick a valid sequence_item and form a sequence UVM UVM , uvm_transaction , uvm_sequence	5	1860	July 21, 2017
Access testbench top signal in test or sequence UVM UVM , uvm_sequence , UVM-uvm_test , root	1	3336	July 6, 2017
How to pass a variable from test to sequence? UVM UVM , config_db , uvm_sequence , UVM-uvm_test , global	3	6733	July 5, 2017
How to check whether the sequence is Active or dead UVM UVM , uvm_sequence , putget	9	2187	June 26, 2017
Change a value of field in the agent configuration file (object) in base sequence UVM UVM , uvm_sequence , agent-configuration-file	0	1461	January 18, 2017
Sequence getting abruptly killed when configure_phase() ends UVM UVM , Cookbook-SequencesStopping , uvm_sequence , main_phase	8	3072	October 23, 2016
Where should I assign the values of the transaction UVM UVM , uvm_transaction , uvm_sequence	3	2151	September 20, 2016
How to get a UVM sequence/agent to generate random triggers on multiple lines independently UVM UVM , uvm_driver , uvm_sequence , uvm_agent	1	1631	September 10, 2016