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    The Verification Academy offers users multiple entry points to find the information they need. One of these entry points is through Topic collections. These topics are industry standards that all design and verification engineers should recognize. While we continue to add new topics, users are encourage to further refine collection information to meet their specific interests.
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    The Verification Academy is organized into a collection of free online courses, focusing on various key aspects of advanced functional verification. Each course consists of multiple sessions—allowing the participant to pick and choose specific topics of interest, as well as revisit any specific topics for future reference. After completing a specific course, the participant should be armed with enough knowledge to then understand the necessary steps required for maturing their own organization’s skills and infrastructure on the specific topic of interest. The Verification Academy will provide you with a unique opportunity to develop an understanding of how to mature your organization’s processes so that you can then reap the benefits that advanced functional verification offers.
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    The Verification Community is eager to answer your UVM, SystemVerilog and Coverage related questions. We encourage you to take an active role in the Forums by answering and commenting to any questions that you are able to.
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    The Verification Academy Patterns Library contains a collection of solutions to many of today's verification problems. The patterns contained in the library span across the entire domain of verification (i.e., from specification to methodology to implementation—and across multiple verification engines such as formal, simulation, and emulation).
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    Find all the methodology you need in this comprehensive and vast collection. The UVM and Coverage Cookbooks contain dozens of informative, executable articles covering all aspects of UVM and Coverage.
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  • All Events
    No one argues that the challenges of verification are growing exponentially. What is needed to meet these challenges are tools, methodologies and processes that can help you transform your verification environment. These recorded seminars from Verification Academy trainers and users provide examples for adoption of new technologies and how to evolve your verification process.
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  • About Verification Academy
    The Verification Academy will provide you with a unique opportunity to develop an understanding of how to mature your organization's processes so that you can then reap the benefits that advanced functional verification offers.
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  • Power Aware Verification

Power Aware Verification

Power Aware Verification Course | Subject Matter Expert - Erich Marschner | Simulation-Based Techniques Topic

Today’s increasingly complex SoCs are typically used in portable systems that must also support increasingly longer battery life and therefore must minimize power consumption. Even non-portable systems must avoid wasting energy, to minimize both power and cooling costs. In both cases, active power management is required to ensure energy efficiency. Although active power management enables the design of low power chips and systems, it also creates many new verification challenges. This course introduces the IEEE Std 1801 Unified Power Format (UPF) for specification of active power management architectures and covers the use of UPF in simulation-based power aware verification.

You are encouraged to first view Evolving Verification Capabilities by Harry Foster that provides the framework for all of the Academy courses.


Erich Marschner
Chuck Seeley
Simulation-Based Techniques
Crawl Walk Run

Sessions

Introduction to Power Aware Verification

Introduction to Power Aware Verification Session | Subject Matter Expert - Erich Marshner | Power Aware Verification Course

This session introduces the IEEE Std 1801 Unified Power Format (UPF).

Overview of UPF

Overview of UPF Session | Subject Matter Expert - Erich Marshner | Power Aware Verification Course

This session gives a quick, high-level overview of the evolution of the UPF standard.

Getting Started with UPF

Getting Started with UPF Session | Subject Matter Expert - Erich Marshner | Power Aware Verification Course

This session presents the core commands and options in UPF 1.0 subset.

A Simple UPF Example

A Simple UPF Example Session | Subject Matter Expert - Erich Marshner | Power Aware Verification Course

This session presents an extended example illustrating the usage of the UPF 1.0 subset.

UPF 2.0 Enhancements

UPF 2.0 Enhancements Session | Subject Matter Expert - Chuck Seeley | Power Aware Verification Course

This session presents UPF 2.0 commands and options that improve usability and provide greater flexibility.

Using Supply Sets

Using Supply Sets Session | Subject Matter Expert - Erich Marshner | Power Aware Verification Course

This session presents the UPF 2.0 concept of a “supply set” and the related commands and options used for defining and using supply sets.

An Enhanced UPF Example

A Simple UPF Example Session | Subject Matter Expert - Chuck Seeley | Power Aware Verification Course

This session presents an extended example illustrating the usage of the UPF 2.0 features of IEEE Std 1801 UPF for specification of the power management architecture for a simple design.

Featured Demos

Questa® Power Aware Simulation Demo

Questa Power Aware Simulation Demo Session | Subject Matter Expert - Chuck Seeley

In this demo, you will learn the UPF based Power Aware features available in Questa PASim.

Questa® Power Aware Visualizer Demo

Questa Power Aware Visualizer Demo Session | Subject Matter Expert - Chuck Seeley

In this demo, you will learn the UPF based Power Aware Debug features available in Visualizer with Questa PASim.

Related Resources

Technical Papers:

  • Effective Elements List and Transitive Natures of UPF Commands
  • Low Power Apps: Shaping the Future of Low Power Verification
  • UPF Information Model: The Future of Low-Power Verification Today
  • Low Power Coverage: The Missing Piece in Dynamic Simulation
  • Random Directed Low-Power Coverage Methodology: A Smart Approach to Power Aware Verification Closure
  • Free Yourself from the Tyranny of Power State Tables with Incrementally Refinable UPF
  • The Fundamental Power States for UPF Modeling and Power Aware Verification
  • Stepping into UPF 2.1 World: Easy Solution to Complex Power Aware Verification
  • Advanced Verification of Low Power Designs
  • To Retain or Not to Retain: How Do I Verify the State Elements of My Low Power Design?
  • Low Power Design and Verification Techniques

Verification Horizons

  • Effective Elements Lists and the Transitive Nature of UPF Commands
  • A New Approach to Low-Power Verification: Power Aware Apps
  • Part 2: Power Aware Static Verification – From Power Intent to Microarchitectural Checks of Low-Power Designs
  • Part I: Power Aware Static Verification - From Power Intent to Microarchitectural Checks of Low-Power Designs
  • PA GLS: The Power Aware Gate-level Simulation
  • Understanding the UPF Power Domain and Domain Boundary
  • Artifacts of Custom Checkers in Questa® Power Aware Dynamic Simulation
  • Power Aware Libraries: Standardization and Requirements for Questa® Power Aware
  • Successive Refinement: A Methodology for Incremental Specification of Power Intent
  • PowerAware RTL Verification of USB 3.0 IPs
  • Taming Power Aware Bugs with Questa®
  • The Evolution of UPF: What's Next?
  • Evolution of UPF: Getting Better All the Time
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