The new Portable Stimulus Standard being worked on in Accellera promises to provide the next leap in verification productivity needed to support the verification of our ever-growing system-on-chip (SoC) designs. In addition to increased complexity, SoC verification requires multiple platforms, including simulation, emulation and FPGA prototyping, each of which typically use different languages and formats for specifying the test, wasting precious time recreating the same test information throughout a project. Portable Stimulus attempts to address this problem by providing a single specification of test intent and coverage at a higher level of abstraction, allowing tools to generate target-specific implementations of the test for the desired platforms and freeing up the verification team to focus on what should be tested. In addition, Portable Stimulus also raises the level at which randomization can be applied, allowing many different but compatible scenarios to be generated from a single graph-based specification of test intent.
This Verification Academy course will provide an introduction to the upcoming Portable Stimulus standard, starting with a discussion of the need for and goals of the standard, taking the viewer through the actual standard itself to provide an understanding of how to create your own specification of Portable Stimulus and how a tool can generate UVM, C or other implementations of the test for your required platform.