|
`define macros usage
|
|
25
|
115645
|
December 16, 2015
|
|
Checking clock period using system verilog assertion
|
|
30
|
54324
|
April 5, 2024
|
|
Generate unique elements in an array
|
|
46
|
66313
|
February 21, 2019
|
|
Interview Questions on Assertions
|
|
26
|
21356
|
June 18, 2025
|
|
What is the difference between uvm_config_db and uvm_resource_db?
|
|
19
|
43566
|
April 28, 2025
|
|
Fork within loop with join ALL
|
|
35
|
56142
|
August 10, 2023
|
|
Why do we need virtual interfaces in system verilog?
|
|
24
|
66607
|
June 4, 2019
|
|
What is the exact difference between static tasks/functions and automatic tasks/functions ? please explain with a clear example
|
|
32
|
55167
|
August 8, 2021
|
|
Verification of ASYNCHRONOUS FIFO
|
|
21
|
30160
|
February 18, 2022
|
|
Need to Use Variable in Assertions ## Delay
|
|
46
|
32880
|
July 1, 2021
|
|
P_sequencer and m_sequencer
|
|
13
|
56237
|
April 28, 2026
|
|
Confusion in fork join ... disable fork
|
|
25
|
41231
|
July 24, 2021
|
|
What difference between @event and wait (event.triggered)?
|
|
14
|
53912
|
November 25, 2022
|
|
Assert Property vs Cover Property
|
|
19
|
46679
|
June 11, 2019
|
|
Fork join_none inside for loop
|
|
32
|
36257
|
March 8, 2025
|
|
How to access a DUT signal from a UVM test case class?
|
|
21
|
39716
|
April 11, 2023
|
|
Queue and mailbox
|
|
14
|
47794
|
July 30, 2025
|
|
SVA : using $past
|
|
15
|
40905
|
October 28, 2020
|
|
Creating new instances of a covergroup using an array
|
|
27
|
30231
|
July 30, 2017
|
|
Oring of ifdef
|
|
9
|
49338
|
November 9, 2017
|
|
Initializing a multidimensional associative array
|
|
11
|
25040
|
October 21, 2020
|
|
Constraint randomization of an array
|
|
21
|
32817
|
June 12, 2024
|
|
Constrain sum of elements in an array
|
|
24
|
29726
|
October 27, 2024
|
|
Cannot create a component as it is not registered with a factory
|
|
14
|
34701
|
April 30, 2017
|
|
P_sequencer / m_sequencer
|
|
11
|
37083
|
February 13, 2026
|
|
For loop inside fork join_none
|
|
25
|
24909
|
December 20, 2024
|
|
How to Terminate UVM simulation?
|
|
23
|
25001
|
April 10, 2020
|
|
Range must be bounded by constant expressions
|
|
11
|
34036
|
March 2, 2024
|
|
Uvm_config_db usage a big confusion
|
|
10
|
34630
|
November 20, 2018
|
|
Why `ifndef and `define are used together?
|
|
13
|
30193
|
July 26, 2019
|
|
Fatal: (SIGSEGV) Bad handle or reference, Error
|
|
22
|
23389
|
April 14, 2014
|
|
Automatic variables in fork
|
|
14
|
28561
|
February 9, 2022
|
|
Regarding Method Overriding / Polymorphism SystemVerilog
|
|
26
|
21131
|
August 15, 2025
|
|
Assertion to check stability of a signal for 'n' clocks
|
|
15
|
27186
|
January 29, 2022
|
|
Regarding Race Condition
|
|
10
|
17873
|
March 14, 2023
|
|
How to stop or kill the running sequences
|
|
15
|
26061
|
December 3, 2017
|
|
UVM_ERROR
|
|
71
|
11866
|
December 15, 2017
|
|
Why system verilog does not allow always block in program scope?
|
|
13
|
23630
|
August 23, 2024
|
|
How to get array of coverpoints
|
|
14
|
22821
|
February 19, 2021
|
|
How to safely delete entries from a queue
|
|
12
|
24478
|
May 26, 2017
|
|
Calling task inside function
|
|
12
|
23634
|
January 20, 2020
|
|
Casting into an enum
|
|
10
|
24442
|
June 19, 2017
|
|
Why is the build() phase in UVM executed in a Top - Down fashion and the other phases in Bottom - Up fashion?
|
|
9
|
25331
|
April 13, 2015
|
|
How to exit from simulation on getting UVM_ERROR
|
|
12
|
22150
|
June 3, 2021
|
|
How to get virtual interface in sequence
|
|
28
|
14525
|
February 18, 2017
|
|
What is the difference between modport and clocking block
|
|
12
|
21654
|
June 17, 2021
|
|
SVA: throughout vs until
|
|
9
|
23636
|
March 14, 2020
|
|
Randomizing a dynamic array size
|
|
13
|
19001
|
December 2, 2018
|
|
SV assertion for clock gating & Reset check
|
|
22
|
14368
|
August 10, 2021
|
|
How do I define an associative array of queues?
|
|
15
|
16608
|
August 19, 2022
|