Topics tagged Polymorphism

Topic	Replies	Views	Activity
Local constructor SystemVerilog SystemVerilog , System-Verilog , Polymorphism , encapsulation	1	276	April 23, 2023
Getting class derivatives names from factory UVM UVM , Polymorphism , factory , OOP , Inheritance	3	516	January 8, 2023
Systemverilog inheritance, how to call multi level up function SystemVerilog SystemVerilog , Polymorphism	2	709	November 8, 2021
Inheritance and Polymorphism SystemVerilog SystemVerilog , Polymorphism , inheritence	3	623	September 4, 2021
Query on polymorphism SystemVerilog SystemVerilog , Polymorphism	1	692	April 23, 2021
Difference between set type override function override and virtual function SystemVerilog SystemVerilog , Polymorphism , Virtual-methods	0	579	October 3, 2020
Individual tests extending from base test UVM UVM , Polymorphism	5	2460	November 17, 2019
Signal written by more than one continuous statement SystemVerilog SystemVerilog , questasim , Polymorphism , BFM , sv-interfaces	2	2570	February 21, 2019
Interface class polymorphism SystemVerilog SystemVerilog , Polymorphism , interface-class	2	1038	December 31, 2018
Bases and derived class in the context of parameterized classes SystemVerilog SystemVerilog , Polymorphism	1	747	October 20, 2018
Polymorphism SystemVerilog SystemVerilog , Polymorphism	14	2953	September 29, 2018
Virtual function and polymorphism SystemVerilog SystemVerilog , Polymorphism	2	1050	September 20, 2018
Polymorphism SystemVerilog SystemVerilog , Polymorphism	5	1174	August 21, 2018
Regarding Method Overriding / Polymorphism SystemVerilog SystemVerilog SystemVerilog , Polymorphism , Method-Overriding	25	20328	August 7, 2018
Compile-time Polymorphism in SV SystemVerilog SystemVerilog , Polymorphism , function-overloading , function-overriding	4	2413	July 25, 2018
How to choose a testcase class from command line on SV SystemVerilog SystemVerilog , Polymorphism , Command-Line-Processing , valueplusargs , testcase	2	4034	June 2, 2016
Task overriding in a sub class SystemVerilog SystemVerilog , Polymorphism , Inheritance	4	6246	May 17, 2016
Why results differs w/ and w/o declaring virtual methods in extended class SystemVerilog SystemVerilog , Polymorphism , casting , Virtual-methods , OOP	2	1500	December 18, 2015
How do variable of base class type access property of derived class SystemVerilog SystemVerilog , uvm_transaction , Polymorphism , deep-copy , uvm_object , clone	1	1583	December 3, 2015
Can derived class object call base class (virtual/non-virtual) function? SystemVerilog SystemVerilog , Polymorphism , Virtual-methods , Inheritance , Nonvirtual-methods	3	4724	September 22, 2015