Topics tagged UVM-monitor

Topic	Replies	Views	Activity
Monitor Sampling edge UVM SystemVerilog , UVM , UVM-monitor , monitor , driver-monitor , systemverilog-uvm , systemverilog-driver-monitor-virtual-interface-transaction	1	63	January 27, 2025
Transcation and monitor establish a data flow of top-level interfaces, how do you monitor the data inside the dut for comparison in scb? UVM UVM , scoreboard , UVM-monitor	2	202	June 18, 2024
Smart way to bundle up multiple RTL signals when passing to monitor SystemVerilog SystemVerilog , UVM-monitor	1	134	May 2, 2024
2 process writing on an analysis port from monitor UVM UVM , analysis-port , UVM-monitor , uvm_monitor-uvm_scoreboard-write	11	1106	March 18, 2024
The use of virtual interface in uvm_monitor UVM UVM , UVM-monitor	1	358	March 8, 2024
Doubt regarding to Monitor transaction collection UVM UVM , UVM-monitor , monitor	1	222	January 4, 2024
How to sample a UVM monitor if clock is not there UVM UVM , UVM-monitor	2	462	October 5, 2023
Monitor for interleaved data UVM UVM , UVM-monitor	4	603	October 15, 2022
How to pass a task output values from interface into the monitor? UVM UVM , UVM-monitor	1	1270	May 2, 2022
Strategy to monitor single signals UVM SystemVerilog , UVM , UVM-monitor	6	1807	July 11, 2021
Guidelines for using analysis port in monitor SystemVerilog SystemVerilog , UVM , analysis-port , UVM-monitor	3	1485	June 30, 2021
Why are we driving the read data after two clocks in driver and monitor of a simple memory design? UVM UVM , UVM-monitor , UVM-Driver	1	1082	March 29, 2021
Last pushback in queue in scoreboard write method, overriding all values in queue UVM UVM , UVM-monitor , UVM-scoreboard , queues-systemverilog	3	2484	December 9, 2020
Monitor scoreboard Error UVM UVM , analysis-port , UVM-monitor , UVM-scoreboard-problem , systemverilog-uvm	4	1419	March 12, 2020
Forever loop in fork_any : Understanding terminating condition SystemVerilog SystemVerilog , UVM-monitor , forever-loopfork-join	1	1189	October 14, 2019
Sampling logic in UVM monitor : on all the clocks UVM UVM , UVM-monitor	6	3667	March 27, 2019
Synchronization between UVM agents? UVM RAL to other agents UVM UVM , uvm-events-synchronisation , UVM-monitor , uvm-ral	5	2367	May 12, 2017
UVM agent topology for request and response interfaces UVM UVM , virtual-interface , uvm-agent , UVM-monitor , UVM-Driver	3	2223	January 23, 2017
Variable data lengths in monitor UVM UVM , UVM-monitor , UVM-Driver	0	1486	March 5, 2015
UVM monitor for FSM UVM UVM , FSM , UVM-monitor	3	4926	May 20, 2014

Monitor Sampling edge

SystemVerilog , UVM , UVM-monitor , monitor , driver-monitor , systemverilog-uvm , systemverilog-driver-monitor-virtual-interface-transaction

1

63

January 27, 2025

Transcation and monitor establish a data flow of top-level interfaces, how do you monitor the data inside the dut for comparison in scb?

UVM

UVM , scoreboard , UVM-monitor

2

202

June 18, 2024

Smart way to bundle up multiple RTL signals when passing to monitor

SystemVerilog

SystemVerilog , UVM-monitor

1

134

May 2, 2024

2 process writing on an analysis port from monitor

UVM

UVM , analysis-port , UVM-monitor , uvm_monitor-uvm_scoreboard-write

11

1106

March 18, 2024

The use of virtual interface in uvm_monitor

UVM

UVM , UVM-monitor

1

358

March 8, 2024

Doubt regarding to Monitor transaction collection

UVM

UVM , UVM-monitor , monitor

1

222

January 4, 2024

How to sample a UVM monitor if clock is not there

UVM

UVM , UVM-monitor

2

462

October 5, 2023

Monitor for interleaved data

UVM

UVM , UVM-monitor

4

603

October 15, 2022

How to pass a task output values from interface into the monitor?

UVM

UVM , UVM-monitor

1

1270

May 2, 2022

Strategy to monitor single signals

UVM

SystemVerilog , UVM , UVM-monitor

6

1807

July 11, 2021

Guidelines for using analysis port in monitor

SystemVerilog

SystemVerilog , UVM , analysis-port , UVM-monitor

3

1485

June 30, 2021

Why are we driving the read data after two clocks in driver and monitor of a simple memory design?

UVM

UVM , UVM-monitor , UVM-Driver

1

1082

March 29, 2021

Last pushback in queue in scoreboard write method, overriding all values in queue

UVM

UVM , UVM-monitor , UVM-scoreboard , queues-systemverilog

3

2484

December 9, 2020

Monitor scoreboard Error

UVM

UVM , analysis-port , UVM-monitor , UVM-scoreboard-problem , systemverilog-uvm

4

1419

March 12, 2020

Forever loop in fork_any : Understanding terminating condition

SystemVerilog

SystemVerilog , UVM-monitor , forever-loopfork-join

1

1189

October 14, 2019

Sampling logic in UVM monitor : on all the clocks

UVM

UVM , UVM-monitor

6

3667

March 27, 2019

Synchronization between UVM agents? UVM RAL to other agents

UVM

UVM , uvm-events-synchronisation , UVM-monitor , uvm-ral

5

2367

May 12, 2017

UVM agent topology for request and response interfaces

UVM

UVM , virtual-interface , uvm-agent , UVM-monitor , UVM-Driver

3

2223

January 23, 2017

Variable data lengths in monitor

UVM

UVM , UVM-monitor , UVM-Driver

0

1486

March 5, 2015

UVM monitor for FSM

UVM

UVM , FSM , UVM-monitor

3

4926

May 20, 2014