The use of virtual interface in uvm_monitor

UVM
,
1

Hi everybody,

I was looking through an example of a monitor implementation in UVM in the ChipVerify website, and stubmled upon virtual interface.

image
image631×914 62.8 KB

There are some questions I have regarding virtual interface.

  1. How is a virtual interface different from a normal interface?

  2. Why is it more apporpriate to use virtual interface in UVM?

Thank you!

Sangwoo

2

Please post code as formatted text, not as a picture.

Virtual interfaces variables contain handles to actual interface instances. This is like a pointer to instance, which is not generally available in SystemVerilog.

See Interfaces and Virtual Interfaces | UVM Cookbook