Doubt regarding to Monitor transaction collection

UVM
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1

Hi There,

I have doubts in monitor transaction collection. On what basis will monitor collect transactions from the virtual interface
for ex :
In AHB 3 lite protocol there is a slave-ready signal based on which we can collect the information and send it to the scoreboard.

In a situation where we don’t have any dut response signal in that cases on what basis does my monitor collect the information from the interface eg When we write a verification environment for a D flip flop on what basis does my monitor collect transactions from the interface

2

For the D-flip flop, you are sampling the design output on a clock edge, not just sampling when the output changes. Think about it - the DFF’s logic reads in the input on the clock edge, stores the value, and drives the output.

You need a predictor and scoreboard that looks at the inputs and says the output should have a certain value by a certain time. You could check if the output changed before that time, or just look at the expected time.