Browse all content in Siemens Verification Academy with the tag functional verification

January 2017

• Jenkins Project Configuration

  Planning, Measurement and Analysis Jan 10, 2017 Darron May Session

• Jenkins VRM Integration

  Planning, Measurement and Analysis Jan 10, 2017 Darron May Demo

• The Fundamental Power States for UPF Modeling and Power Aware Verification

  Standards Jan 04, 2017 Verification Methodology Team Article

• Verification IP Stimulus APIs - Are They Really Easy to Use?

  Simulation Jan 03, 2017 Verification Methodology Team Article

• Extending a Traditional VIP to Solve PHY Verification Challenges

  Simulation Jan 03, 2017 Verification Methodology Team Article

• Boost Verification Results by Bridging the Hardware/Software Testbench Gap

  Simulation Jan 03, 2017 Matthew Ballance Article

• Boosting Simulation Performance of UVM Registers in High Performance Systems

  Standards Jan 03, 2017 Verification Methodology Team Article

• Easy Steps Towards Virtual Prototyping using the SystemVerilog DPI

  Simulation Jan 03, 2017 Dave Rich Article

• Register Verification: Do We Have Reliable Specification?

  Simulation Jan 03, 2017 Verification Methodology Team Article

• Sequence, Sequence on the Wall – Who's the Fairest of Them All?

  Standards Jan 03, 2017 Rich Edelman Article

• Seven Separate Sequence Styles Speed Stimulus Scenarios

  Standards Jan 03, 2017 Mark Peryer Article

• The Need For Speed: Understanding Design Factors That Make Multi-Core Parallel Simulations Efficient

  Simulation Jan 03, 2017 Verification Methodology Team Article

• Traffic Profiling and Performance Instrumentation For On-Chip Interconnects

  Standards Jan 03, 2017 Mark Peryer Article

• UCIS Applications: Improving Verification Productivity, Simulation Throughput, and Coverage Closure Process

  Standards Jan 03, 2017 Verification Methodology Team Article

• Weathering the Verification Storm: Methodology Enhancements used on a Next Generation Weather Satellite C&DH Program

  Standards Jan 03, 2017 Mike Horn Article

• Equivalence Validation of Analog Behavioral Models

  Analog Mixed-Signal Jan 03, 2017 Verification Methodology Team Article

• Interpreting UPF For A Mixed-Signal Design Under Test

  Standards Jan 03, 2017 Verification Methodology Team Article

• Using Test-IP Based Verification Techniques in a UVM Environment

  Standards Jan 03, 2017 Verification Methodology Team Article

• Is Your Power Aware Design Really X-Aware?

  Simulation Jan 03, 2017 Verification Methodology Team Article

• Stepping into UPF 2.1 World: Easy Solution to Complex Power Aware Verification

  Standards Jan 03, 2017 Verification Methodology Team Article

• So You Think You Have Good Stimulus: System-Level Distributed Metrics Analysis and Results

  Simulation Jan 03, 2017 Andreas Meyer Article

• Are You Really Confident That You Are Getting the Very Best From Your Verification Resources?

  Verification Management Jan 03, 2017 Darron May Article

• Bringing Regression Systems into the 21st Century

  Verification Management Jan 03, 2017 Thom Ellis Article

October 2014

• Navigating the Perfect Storm: New School Verification Solutions

  FPGA Verification Oct 15, 2014 Tom Fitzpatrick Webinar

June 2012

• Introduction to Metrics

  Planning, Measurement and Analysis Jun 01, 2012 Harry Foster Session