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Show Less

November 2020

I’m Excited About Formal…My Journey From Skeptic to Believer
Formal Verification Nov 09, 2020 pdf

October 2020

ISO 26262 Fault Campaign Management
Functional Safety Oct 29, 2020 Jacob Wiltgen pdf
FPGA Functional Verification Trend Report - 2020
FPGA Verification Oct 13, 2020 Harry Foster pdf

September 2020

ISO 26262 Bottoms-Up Safety Analysis
Functional Safety Sep 29, 2020 Jacob Wiltgen pdf

July 2020

When Are You Done Running CDC?
Clock-Domain Crossing Jul 16, 2020 Chris Giles pdf

April 2020

ISO 26262 in Simple Terms
Functional Safety Apr 21, 2020 Jacob Wiltgen pdf
ISO 26262 Requirements Management
Functional Safety Apr 21, 2020 Jacob Wiltgen pdf
Code Generation Merging
UVM Framework Apr 01, 2020 Jonathan Craft pdf

March 2020

Mind the GAP(s): Closing and Creating GAPS Between Design and Verification
Questa Design Solutions Mar 31, 2020 Chris Giles pdf
FPGA Verification Maturity: A Quantitative Analysis
FPGA Verification Mar 26, 2020 pdf

October 2019

Why Reset Domain Crossing Verification is an Emerging Requirement
Questa Design Solutions Oct 01, 2019 Kurt Takara pdf

September 2019

Stimulus and Analysis Data Flow
UVM Framework Sep 09, 2019 Bob Oden pdf
Code Generation Guidelines
UVM Framework Sep 09, 2019 Jonathan Craft pdf

August 2019

Using HLS to Accelerate Computer Vision for Autonomous Drive
High-Level Synthesis Aug 20, 2019 pdf

July 2019

Portable Stimulus: Is It Revolution or Evolution?
Portable Stimulus Jul 15, 2019 Tom Fitzpatrick pdf
An Emulation Strategy for AI and ML Designs
Machine Learning Jul 15, 2019 Vijay Chobisa pdf
Tessent: DFT Enablement for AI Devices
Machine Learning Jul 15, 2019 Geir Eide pdf
Deep Learning Accelerator Using HLS
High-Level Synthesis Jul 15, 2019 pdf
Improving Verification Throughput of Today’s Complex Mixed-Signal ICs
Analog Mixed-Signal Jul 12, 2019 pdf
Selecting the Most Productive SoC Design Verification Techniques
Planning, Measurement and Analysis Jul 12, 2019 pdf
Veloce HYCON - OS-aware IP Development Solution
Acceleration Jul 12, 2019 pdf
RISC-V Core and SoC: Compliance, Verification, Customization
Verification IP Jul 11, 2019 Larry Lapides pdf
Emulation to Prototype - What’s Eating Your Productivity?
Acceleration Jul 11, 2019 pdf
Questa Verification IP and Portable Stimulus Maximize Your UVM Productivity
Portable Stimulus Jul 11, 2019 Tom Fitzpatrick pdf
Clock-Domain Crossing Analyses and Verification
Clock-Domain Crossing Jul 10, 2019 Kurt Takara pdf

User2User - Santa Clara

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Productivity Webinar

Wednesday, May 21st-8:00 AM PDT

Solving the Semiconductor Verification Crisis: From Problem to Productivity

Traceability Webinar

Wednesday, May 28th-8:00 AM PDT

Streamlining Requirements Traceability Using Questa Verification IQ Testplan Author

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Tuesday, Jun 03rd-6:30 AM PDT

Hudson, MA | American Heritage Museum

Fault Simulation Webinar

Wednesday, Jun 04th-8:00 AM PDT

Enhancing Automotive Safety Verification Using Questa One Sim FX

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Thursday, Jun 05th-7:30 AM PDT

Huntsville, AL | Siemens Training Center

Coverage Webinar

Wednesday, Jun 18th-8:00 AM PDT

Accelerating Functional Coverage with Questa One CX

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