Topics tagged logic

Topic	Replies	Views	Activity
Reg vs wire vs logic @SystemVerilog SystemVerilog SystemVerilog , reg , wire , logic	1	22407	December 28, 2013
Cube root SystemVerilog SystemVerilog , logic , systemverilog-Arrays-logics , uvm-sv-constraints	5	1104	May 28, 2022
What is the output? SystemVerilog SystemVerilog , logic , fork_join	3	849	May 5, 2022
Arranging zeroes in an array at odd indices SystemVerilog SystemVerilog , logic , systemverilog-Arrays , uvm-packed-unpacked-array-SV	3	964	May 2, 2022
Why is the variable a not randomizing with given constraints? SystemVerilog SystemVerilog , logic , uvm-sv-constraints , systemverilog-distribution-constraints	2	791	April 26, 2022
Constraints SystemVerilog SystemVerilog , logic , constraint-randomization , uvm-sv-constraints	5	1125	April 26, 2022
Fibonacci Series with negative numbers SystemVerilog SystemVerilog , logic , system-verilog-sum	1	866	April 19, 2022
Printing non-unique elements in an array SystemVerilog SystemVerilog , logic , systemverilog-Arrays	1	711	April 16, 2022
Shifting on signed arithmetic SystemVerilog SystemVerilog , logic , signed , unsigned	4	5117	July 15, 2021
SV checker implementation SystemVerilog SystemVerilog , logic , Checkers , SVA-Assertion-Systemverilog	1	1428	July 12, 2021
Port mismatch while connect interface and dut SystemVerilog SystemVerilog , wire , logic , interface	3	3248	June 6, 2021
Logic keyword SystemVerilog SystemVerilog , logic	3	1413	May 4, 2021
Disadvantage of logic SystemVerilog SystemVerilog , logic	4	1462	March 23, 2021
Why can't we declare and assign a logic type in one step? SystemVerilog SystemVerilog , logic	6	6160	February 11, 2021
Packed logic array, signed/unsigned SystemVerilog SystemVerilog , logic , packed , unsigned	2	3537	December 2, 2020
While loop logic SystemVerilog SystemVerilog , UVM , logic	1	1229	July 6, 2019
Wire vs Logic SystemVerilog SystemVerilog , wire , logic , Mapping-data-types , ports	2	17311	February 11, 2018
System verilog data type SystemVerilog SystemVerilog , logic	2	1417	January 24, 2018