Topics tagged Coverage

Topic	Replies	Views	Activity
System Verilog , Coverage Coverage Coverage , svcoverage	1	518	November 9, 2023
Cover modes in spi Coverage Coverage , Dave-Rich , chris-sue , Chris-Spear	1	359	October 27, 2023
System Verilog coverage Coverage Coverage , System-Verilog , systemverilog-coverage-cross , Coverage-bins	5	604	September 25, 2023
Null object error Coverage Coverage , System-Verilog , Null-Object-Access , coverage-UVM-module-class	1	399	September 16, 2023
SVA Covered and Uncovered properties in coverage report SystemVerilog SystemVerilog , Coverage , SVA , UVM-Verdi	2	287	September 14, 2023
Functional Coverage for multiple monitors Coverage Coverage	1	287	August 29, 2023
At which time subscriber should sample the packet for coverage? UVM UVM , Coverage , Subscriber-in-uvm	4	299	August 28, 2023
How to exclude bins which are getting created automatically? Coverage Coverage , SystemVerilog-FunctionalCoverage	2	393	August 25, 2023
Command for exclude any line from code in code coverage Coverage Coverage	1	265	August 24, 2023
Option.comment and type_option.comment Coverage Coverage , Coverage-bins	1	385	August 16, 2023
Coverage analyze Coverage Coverage , Coverage-bins , coverage-analyze	1	318	August 7, 2023
How to write the functional coverage for SRAM 1KB, 4KB, 8KB, 16KB and 1MB? Coverage Coverage	1	421	July 31, 2023
Coverges implicit bins Coverage Coverage , covergroup , Coverage-bins , crosscoverage	1	398	July 31, 2023
How many bins are created and bins are covered, Here the percentage is 43.750000%? and why? Coverage Coverage	6	573	July 25, 2023
How to create the cover group's bins that based on array's values Coverage Coverage , coverage-bins-uvm-array	6	688	June 28, 2023
Why the assertion happens but its pass count is zero in the coverage result? Coverage Coverage , concurrent-assertion , assertion-coverage	1	421	June 23, 2023
Disabling auto bins Coverage Coverage , disable-auto-bins	4	513	June 21, 2023
Systemverilog: cross Coverage and Ignore bins SystemVerilog SystemVerilog , Coverage , cross-coverage , cross-coverage-bins , systemverilog-coverage	5	12981	June 15, 2023
How can I quantify the coverage in scenario verification? Coverage Coverage	1	321	June 14, 2023
Cover all cases of comparing two values in functional coverage Coverage Coverage , Coverage-bins , SystemVerilog-FunctionalCoverage	1	525	June 11, 2023
Coverage: cover change number of inputs in a generic way Coverage Coverage , Coverage-bins	1	362	June 8, 2023
Coverage for the value difference between associative arrays SystemVerilog SystemVerilog , Coverage , System-Verilog , associative_arrays	1	330	June 1, 2023
Disabling a covergroup or coverpoint Coverage Coverage	7	984	May 20, 2023
ISO26262 and Code Coverage and Functional Coverage Coverage Coverage , FEC , ISO26262	1	525	May 19, 2023
Fsm functional coverage Coverage Coverage	2	687	May 6, 2023
Functional coverage Coverage Coverage	1	466	April 26, 2023
Parametric bin assignment? Coverage Coverage , coverpoint , conditional-bin , parametric-amount-of-bins	3	627	April 24, 2023
Covergroup "per object" as opposed to "per instance" UVM UVM , Coverage	1	376	April 22, 2023
Cross coverage between different covergroups Coverage SystemVerilog , Coverage	5	16269	April 20, 2023
Unified Verification Environment UVM UVM , Coverage , uvm_env , UVM-scoreboard	2	425	April 20, 2023