How to exclude bins which are getting created automatically?

Coverage
,
1

I have two coverpoints as shown below.
Whenever soft_reset is high and dma_states is 3 then I want to hit a bin. so I created cross coverage bin named as srst_high_state3. and it is working fine.
But the problem is it is creating other bins which I don’t want. I just want this rst_high_state3 bins to be created. what is the solution? Or is there any other way to achieve this requirement?


    cp_soft_reset: coverpoint soft_reset{
      bins srst_high = {1};
      bins srst_low = {0};
    }
    cp_dma_states: coverpoint dma_states{
      bins state3 = {3};
      bins state4 = {4};
      bins state6 = {6};
   }
    cx_srst_states: cross cp_soft_reset, cp_dma_states{
      bins srst_high_state3 = binsof(cp_soft_reset.srst_high) && binsof(cp_dma_states.state3);
   }
2

In reply to Abuzar Gaffari:

Hi,you can use ignore bins:-

     cp_soft_reset: coverpoint soft_reset
  	 {
      bins srst_high = {1};
      bins srst_low = {0};
     }
  
     cp_dma_states: coverpoint dma_states
    {
      bins state3 = {3};
      bins state4 = {4};
      bins state6 = {6};
   	}
    
    cx_srst_states: cross cp_soft_reset, cp_dma_states
    {
      bins srst_high_state3 = binsof(cp_soft_reset.srst_high) && binsof(cp_dma_states.state3);
      ignore_bins ig_zero = binsof(cp_soft_reset) intersect {0};
      ignore_bins ig_state4 = binsof(cp_dma_states.state4);
      ignore_bins ig_state6 = binsof(cp_dma_states.state6);
    }
3

In reply to Abuzar Gaffari:

In some cases it’s easer to create a coverpoint expression than using a cross.

cx_srst_states: coverpoint soft_reset && cp_dma_states == 3 {
     bins srst_high_state3 = {1};
}

Note that the upcoming 1800-2023 SystemVerilog LRM has a new option cross_retain_auto_bins that can be set to 0 to prevent retention of automatically created cross bins.