Browse all Intermediate content in Siemens Verification Academy
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June 2023
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Revolutionizing RTL Design: Unveiling the Latest Updates and Roadmap of the Questa Simulation Platform
Simulation Jun 06, 2023 pdf
May 2023
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Transactional Assertions - Where representation influences thinking
Formal Verification May 31, 2023 pdf -
Break the RISC-V customization barrier with Processor Formal Verification
Formal Verification May 31, 2023 pdf -
When Regular CDC Is Not Enough: Reset Domain Crossing Verification and Hierarchical Data Modeling (HDM)
Clock-Domain Crossing May 31, 2023 pdf -
Advanced CDC flows: Dynamic Metastability Modeling, Protocol Verification, Reconvergence
Clock-Domain Crossing May 31, 2023 pdf -
Enhancing CDC flows with Machine Learning (ML) today, and the future roadmap of static solutions
Questa Design Solutions May 31, 2023 pdf -
Efficient Interconnect Formal Verification for Complex, Large-scale Designs
Formal Verification May 17, 2023 Webinar -
Efficient Interconnect Formal Verification for Complex, Large-scale Designs
Formal Verification May 17, 2023 pdf
April 2023
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Questa Verification IQ: Boost Verification Predictability and Efficiency with Big Data
Planning, Measurement and Analysis Apr 11, 2023 Webinar
March 2023
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Continuous Integration (CI) driving efficient program execution
Questa Design Solutions Mar 28, 2023 Webinar -
Continuous Integration (CI) driving efficient program execution
Questa Design Solutions Mar 28, 2023 pdf -
How to Exhaustively Verify Register I/O Policies Without Exhausting Yourself
Formal Verification Mar 18, 2023 Webinar
February 2023
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A Formal-based Approach for Efficient RISC-V Processor Verification
Formal Verification Feb 24, 2023 Article -
Big Data for Verification – Inspiration from Large Language Models
Machine Learning Feb 24, 2023 link
December 2022
November 2022
October 2022
September 2022
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Overcoming Today’s Verification, Supply Chain, and Legacy Technology Challenges Associated with FPGA-based Designs
Formal Verification Sep 30, 2022 Webinar