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January 2013

Overview to Improve AMS Quality
Analog Mixed-Signal Jan 25, 2013 Ahmed Eisawy Session
AMS Design Configuration Schemes
Analog Mixed-Signal Jan 25, 2013 Ahmed Eisawy Session
Mixing Languages
Analog Mixed-Signal Jan 25, 2013 Ahmed Eisawy Session
Design Topologies
Analog Mixed-Signal Jan 25, 2013 Ahmed Eisawy Session
Design Methodologies
Analog Mixed-Signal Jan 25, 2013 Ahmed Eisawy Session
Analog/Mixed-Signal Domain
Analog Mixed-Signal Jan 25, 2013 Ahmed Eisawy Session
Overview to AMS Configuration
Analog Mixed-Signal Jan 25, 2013 Ahmed Eisawy Session
Improve AMS Verification Performance
Analog Mixed-Signal Jan 25, 2013 Ahmed Eisawy Session
AMS Modeling Guidance
Analog Mixed-Signal Jan 25, 2013 Ahmed Eisawy Session
Modeling Abstraction
Analog Mixed-Signal Jan 25, 2013 Ahmed Eisawy Session
AMS Engines
Analog Mixed-Signal Jan 25, 2013 Ahmed Eisawy Session
Overview to Improve AMS Performance
Analog Mixed-Signal Jan 25, 2013 Ahmed Eisawy Session
VHDL-2008 Overview
VHDL 2008 Jan 18, 2013 Jim Lewis Session
Testbench Enhancements
VHDL 2008 Jan 18, 2013 Jim Lewis Session
RTL Enhancements
VHDL 2008 Jan 18, 2013 Jim Lewis Session
Operator Enhancements
VHDL 2008 Jan 18, 2013 Jim Lewis Session
Package Type Enhancements
VHDL 2008 Jan 18, 2013 Jim Lewis Session
Fixed Point Package
VHDL 2008 Jan 18, 2013 Jim Lewis Session
Floating Point Package
VHDL 2008 Jan 18, 2013 Jim Lewis Session
VHDL-2008 Why It Matters
VHDL 2008 Jan 17, 2013 Jim Lewis Track

November 2012

Effectively Modeling and Analyzing Coverage
Coverage Nov 15, 2012 Tom Fitzpatrick Webinar

October 2012

Verification Horizons - Volume 8, Issue 3
Standards Oct 01, 2012 Tom Fitzpatrick pdf

September 2012

UVM 1.1c Class Reference
UVM - Universal Verification Methodology Sep 19, 2012 html
More UVM Registers
UVM - Universal Verification Methodology Sep 17, 2012 Tom Fitzpatrick Webinar
Protocol Layering
UVM - Universal Verification Methodology Sep 17, 2012 Tom Fitzpatrick Webinar

FPU Webinar

Wednesday, Feb 05th-8:00 AM PST

Streamlining FPU Verification with an Alternative to C-reference Model Approaches

Regression Webinar

Wednesday, Feb 12th-8:00 AM PST

Smart Regression: Optimize Regression Efficiency Using Questa Verification IQ Regression Navigator

New UVMF Release

The UVM Framework (UVMF) provides a jump-start for learning UVM and building UVM verification environments.

Simulation Webinar

Unlocking the Power of QuestaSim and Visualizer Integration

VA Live: El Segundo

Thursday, Feb 06th-9:30 AM PST

Formal Security Verification, AI/ML, RTL Simulation, and more

Safety & Security Webinar

Wednesday, Feb 19th-8:00 AM PST

FPGA Equivalence Checking from RTL to the Bitstream

Formal Security Webinar

Explore How to Protect Against Data Corruption with Formal Security Verification

Functional Safety Webinar

An End-to-End Functional Safety Solution for Automotive ICs Based on ISO 26262

Missing Forum Notifications?

Check out this blog post from Dave Rich on how to enable Forum Notifications.

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